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[AsmPrinterDwarf] Add support for .cfi_restore directive 

As of today we only use .cfi_offset to specify the offset of a CSR, but
we never use .cfi_restore when the CSR is restored.

If we want to perform a more advanced type of shrink-wrapping, we need
to use .cfi_restore in order to switch the CFI state between blocks.

This patch only aims at adding support for the directive.

Differential Revision: https://reviews.llvm.org/D36114

llvm-svn: 317199
This commit is contained in:
Francis Visoiu Mistrih 2017-11-02 12:00:58 +00:00
parent e73b85d1ab
commit 66d2c269dc
10 changed files with 148 additions and 31 deletions
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3
llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
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@ -219,6 +219,9 @@ void AsmPrinter::emitCFIInstruction(const MCCFIInstruction &Inst) const {
case MCCFIInstruction::OpEscape:
OutStreamer->EmitCFIEscape(Inst.getValues());
break;
case MCCFIInstruction::OpRestore:
OutStreamer->EmitCFIRestore(Inst.getRegister());
break;
}
}

1
llvm/lib/CodeGen/MIRParser/MILexer.cpp
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@ -216,6 +216,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
.Case("def_cfa_register", MIToken::kw_cfi_def_cfa_register)
.Case("def_cfa_offset", MIToken::kw_cfi_def_cfa_offset)
.Case("def_cfa", MIToken::kw_cfi_def_cfa)
.Case("restore", MIToken::kw_cfi_restore)
.Case("blockaddress", MIToken::kw_blockaddress)
.Case("intrinsic", MIToken::kw_intrinsic)
.Case("target-index", MIToken::kw_target_index)

1
llvm/lib/CodeGen/MIRParser/MILexer.h
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@ -68,6 +68,7 @@ struct MIToken {
kw_cfi_def_cfa_register,
kw_cfi_def_cfa_offset,
kw_cfi_def_cfa,
kw_cfi_restore,
kw_blockaddress,
kw_intrinsic,
kw_target_index,

7
llvm/lib/CodeGen/MIRParser/MIParser.cpp
View File

@ -1634,6 +1634,12 @@ bool MIParser::parseCFIOperand(MachineOperand &Dest) {
CFIIndex =
MF.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset));
break;
case MIToken::kw_cfi_restore:
if (parseCFIRegister(Reg))
return true;
CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
break;
default:
// TODO: Parse the other CFI operands.
llvm_unreachable("The current token should be a cfi operand");
@ -1912,6 +1918,7 @@ bool MIParser::parseMachineOperand(MachineOperand &Dest,
case MIToken::kw_cfi_def_cfa_register:
case MIToken::kw_cfi_def_cfa_offset:
case MIToken::kw_cfi_def_cfa:
case MIToken::kw_cfi_restore:
return parseCFIOperand(Dest);
case MIToken::kw_blockaddress:
return parseBlockAddressOperand(Dest);

6
llvm/lib/CodeGen/MIRPrinter.cpp
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@ -1243,6 +1243,12 @@ void MIPrinter::print(const MCCFIInstruction &CFI,
printCFIRegister(CFI.getRegister(), OS, TRI);
OS << ", " << CFI.getOffset();
break;
case MCCFIInstruction::OpRestore:
OS << "restore ";
if (CFI.getLabel())
OS << "<mcsymbol> ";
printCFIRegister(CFI.getRegister(), OS, TRI);
break;
default:
// TODO: Print the other CFI Operations.
OS << "<unserializable cfi operation>";

8
llvm/lib/MC/MCAsmStreamer.cpp
View File

@ -260,6 +260,7 @@ public:
void EmitCFILsda(const MCSymbol *Sym, unsigned Encoding) override;
void EmitCFIRememberState() override;
void EmitCFIRestoreState() override;
void EmitCFIRestore(int64_t Register) override;
void EmitCFISameValue(int64_t Register) override;
void EmitCFIRelOffset(int64_t Register, int64_t Offset) override;
void EmitCFIAdjustCfaOffset(int64_t Adjustment) override;
@ -1385,6 +1386,13 @@ void MCAsmStreamer::EmitCFIRestoreState() {
EmitEOL();
}
void MCAsmStreamer::EmitCFIRestore(int64_t Register) {
MCStreamer::EmitCFIRestore(Register);
OS << "\t.cfi_restore ";
EmitRegisterName(Register);
EmitEOL();
}
void MCAsmStreamer::EmitCFISameValue(int64_t Register) {
MCStreamer::EmitCFISameValue(Register);
OS << "\t.cfi_same_value ";

37
llvm/test/CodeGen/AArch64/cfi_restore.mir Normal file
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@ -0,0 +1,37 @@
# RUN: llc -mtriple=aarch64-- -start-after prologepilog -o - %s | FileCheck %s
---
name: fun
# CHECK: .cfi_startproc
tracksRegLiveness: true
frameInfo:
stackSize: 16
maxAlignment: 8
hasCalls: true
stack:
- { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: 0,
callee-saved-register: '%lr' }
- { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: 0,
callee-saved-register: '%fp' }
body: |
bb.0:
liveins: %fp, %lr
%sp = frame-setup SUBXri %sp, 16, 0
frame-setup STRXui killed %fp, %sp, 0 :: (store 8 into %stack.1)
frame-setup CFI_INSTRUCTION offset %w29, -16
; CHECK: .cfi_offset w29, -16
frame-setup STRXui killed %lr, %sp, 1 :: (store 8 into %stack.0)
frame-setup CFI_INSTRUCTION offset %w30, -8
; CHECK: .cfi_offset w30, -8
%fp = frame-setup ADDXri %sp, 0, 0
frame-setup CFI_INSTRUCTION def_cfa %w29, 16
%lr = LDRXui %sp, 1 :: (load 8 from %stack.0)
CFI_INSTRUCTION restore %w30
; CHECK: .cfi_restore w30
%fp = LDRXui %sp, 0 :: (load 8 from %stack.1)
CFI_INSTRUCTION restore %w29
; CHECK: .cfi_restore w29
%sp = ADDXri %sp, 16, 0
RET_ReallyLR
; CHECK: .cfi_endproc
...

31
llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
View File

@ -1,31 +0,0 @@
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the def_cfa operands
# correctly.
--- |
declare void @foo()
define void @trivial_fp_func() {
entry:
call void @foo()
ret void
}
...
---
name: trivial_fp_func
body: |
bb.0.entry:
liveins: %lr, %fp, %lr, %fp
%sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
%fp = frame-setup ADDXri %sp, 0, 0
; CHECK: CFI_INSTRUCTION def_cfa %w29, 16
frame-setup CFI_INSTRUCTION def_cfa %w29, 16
frame-setup CFI_INSTRUCTION offset %w30, -8
frame-setup CFI_INSTRUCTION offset %w29, -16
BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
%sp, %fp, %lr = LDPXpost %sp, 2
RET_ReallyLR
...

59
llvm/test/CodeGen/MIR/AArch64/cfi.mir Normal file
View File

@ -0,0 +1,59 @@
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the cfi directives correctly.
--- |
declare void @foo()
define void @trivial_fp_func() {
entry:
call void @foo()
ret void
}
define void @trivial_fp_func_restore() {
entry:
call void @foo()
ret void
}
...
---
name: trivial_fp_func
# CHECK-LABEL: name: trivial_fp_func
body: |
bb.0.entry:
liveins: %lr, %fp, %lr, %fp
%sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
%fp = frame-setup ADDXri %sp, 0, 0
; CHECK: CFI_INSTRUCTION def_cfa %w29, 16
frame-setup CFI_INSTRUCTION def_cfa %w29, 16
frame-setup CFI_INSTRUCTION offset %w30, -8
frame-setup CFI_INSTRUCTION offset %w29, -16
BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
%sp, %fp, %lr = LDPXpost %sp, 2
RET_ReallyLR
...
---
name: trivial_fp_func_restore
# CHECK-LABEL: name: trivial_fp_func_restore
body: |
bb.0.entry:
liveins: %lr, %fp
%sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
%fp = frame-setup ADDXri %sp, 0, 0
frame-setup CFI_INSTRUCTION def_cfa %w29, 16
frame-setup CFI_INSTRUCTION offset %w30, -8
; CHECK: CFI_INSTRUCTION offset %w30, -8
frame-setup CFI_INSTRUCTION offset %w29, -16
; CHECK: CFI_INSTRUCTION offset %w29, -16
BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
%sp, %fp, %lr = LDPXpost %sp, 2
CFI_INSTRUCTION restore %w30
; CHECK: CFI_INSTRUCTION restore %w30
CFI_INSTRUCTION restore %w29
; CHECK: CFI_INSTRUCTION restore %w29
RET_ReallyLR
...

26
llvm/test/MC/AArch64/cfi.s Normal file
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@ -0,0 +1,26 @@
// RUN: llvm-mc -triple aarch64-- -o - %s | FileCheck %s
fun:
.cfi_startproc
// CHECK: .cfi_startproc
stp x29, x30, [sp, #-16]!
.Lcfi0:
.cfi_offset w29, -16
// CHECK: .cfi_offset w29, -16
.Lcfi1:
.cfi_offset w30, -8
// CHECK: .cfi_offset w30, -8
mov x29, sp
.Lcfi2:
.cfi_def_cfa w29, 16
// CHECK: .cfi_def_cfa w29, 16
.Lcfi3:
.cfi_restore w30
// CHECK: .cfi_restore w30
ldr x29, [sp], #16
.Lcfi4:
.cfi_restore w29
// CHECK: .cfi_restore w29
ret
.cfi_endproc
// CHECK: .cfi_endproc