diff --git a/llvm/lib/Target/IA64/IA64ISelLowering.cpp b/llvm/lib/Target/IA64/IA64ISelLowering.cpp
index bcce7e672e1a..dbf205d93233 100644
--- a/llvm/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/llvm/lib/Target/IA64/IA64ISelLowering.cpp
@@ -530,7 +530,8 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
     case MVT::f32:
       RetVal = DAG.getCopyFromReg(Chain, IA64::F8, MVT::f64, InFlag);
       Chain = RetVal.getValue(1);
-      RetVal = DAG.getNode(ISD::TRUNCATE, MVT::f32, RetVal);
+      RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal,
+                           DAG.getIntPtrConstant(0));
       break;
     case MVT::f64:
       RetVal = DAG.getCopyFromReg(Chain, IA64::F8, MVT::f64, InFlag);