replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Test more than just label names and make test work on non-x86 hosts. 

llvm-svn: 122153
This commit is contained in:
Benjamin Kramer 2010-12-18 14:07:28 +00:00
parent 8786aab475
commit 5f6219d929
1 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
llvm/test/CodeGen/X86/vec-sign.ll
View File

@ -1,9 +1,11 @@
; RUN: llc < %s -mcpu=nehalem | FileCheck %s
; RUN: llc < %s -march=x86 -mcpu=nehalem | FileCheck %s
define <4 x i32> @psignd(<4 x i32> %a, <4 x i32> %b) nounwind ssp {
entry:
; CHECK: psignd:
; CHECK: psignd
; CHECK-NOT: sub
; CHECK: ret
%b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
%sub = sub nsw <4 x i32> zeroinitializer, %a
%0 = xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1>
@ -15,7 +17,9 @@ entry:
define <4 x i32> @pblendvb(<4 x i32> %b, <4 x i32> %a, <4 x i32> %c) nounwind ssp {
entry:
; CHECK: pblendvb:
; CHECK: pblendvb
; CHECK: ret
%b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
%sub = sub nsw <4 x i32> zeroinitializer, %a
%0 = xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1>