replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Tidy up a bit. 

llvm-svn: 135945
This commit is contained in:
Jim Grosbach 2011-07-25 20:00:32 +00:00
parent ca24cfa427
commit 5ed9fe8037
1 changed files with 2 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
llvm/lib/Target/ARM/ARMInstrInfo.td
View File

@ -419,15 +419,8 @@ def shift_imm : Operand<i32> {
let ParserMatchClass = ShifterAsmOperand;
}
def ShiftedRegAsmOperand : AsmOperandClass {
let Name = "ShiftedReg";
}
def ShiftedImmAsmOperand : AsmOperandClass {
let Name = "ShiftedImm";
}
// shifter_operand operands: so_reg_reg, so_reg_imm, and so_imm.
def ShiftedRegAsmOperand : AsmOperandClass { let Name = "ShiftedReg"; }
def so_reg_reg : Operand<i32>, // reg reg imm
ComplexPattern<i32, 3, "SelectRegShifterOperand",
[shl, srl, sra, rotr]> {
@ -437,6 +430,7 @@ def so_reg_reg : Operand<i32>, // reg reg imm
let MIOperandInfo = (ops GPR, GPR, shift_imm);
}
def ShiftedImmAsmOperand : AsmOperandClass { let Name = "ShiftedImm"; }
def so_reg_imm : Operand<i32>, // reg imm
ComplexPattern<i32, 2, "SelectImmShifterOperand",
[shl, srl, sra, rotr]> {