From 5dfe6dab254decb87a8f798e18bb812eca3ca626 Mon Sep 17 00:00:00 2001 From: Chad Rosier Date: Wed, 22 Feb 2012 17:25:00 +0000 Subject: [PATCH] Remove extra semi-colons. llvm-svn: 151169 --- llvm/lib/Analysis/RegionInfo.cpp | 2 +- llvm/lib/CodeGen/BranchFolding.cpp | 4 ++-- llvm/lib/Support/DataExtractor.cpp | 2 +- llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 2 +- llvm/lib/Target/MSP430/MSP430ISelLowering.cpp | 4 ++-- llvm/lib/Target/X86/X86Subtarget.cpp | 2 +- llvm/lib/VMCore/GCOV.cpp | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) diff --git a/llvm/lib/Analysis/RegionInfo.cpp b/llvm/lib/Analysis/RegionInfo.cpp index 828913dd7b69..b507b1e340f5 100644 --- a/llvm/lib/Analysis/RegionInfo.cpp +++ b/llvm/lib/Analysis/RegionInfo.cpp @@ -650,7 +650,7 @@ void RegionInfo::buildRegionsTree(DomTreeNode *N, Region *region) { // This basic block is a start block of a region. It is already in the // BBtoRegion relation. Only the child basic blocks have to be updated. if (it != BBtoRegion.end()) { - Region *newRegion = it->second;; + Region *newRegion = it->second; region->addSubRegion(getTopMostParent(newRegion)); region = newRegion; } else { diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp index 6aa170b536e4..272e9f93dc9d 100644 --- a/llvm/lib/CodeGen/BranchFolding.cpp +++ b/llvm/lib/CodeGen/BranchFolding.cpp @@ -1111,7 +1111,7 @@ ReoptimizeBlock: } } PrevBB.splice(PrevBB.end(), MBB, MBB->begin(), MBB->end()); - PrevBB.removeSuccessor(PrevBB.succ_begin());; + PrevBB.removeSuccessor(PrevBB.succ_begin()); assert(PrevBB.succ_empty()); PrevBB.transferSuccessors(MBB); MadeChange = true; @@ -1670,7 +1670,7 @@ bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) { LocalDefsSet.insert(*OR); } - HasDups = true;; + HasDups = true; ++TIB; ++FIB; } diff --git a/llvm/lib/Support/DataExtractor.cpp b/llvm/lib/Support/DataExtractor.cpp index b946c1df8363..dc21155a0624 100644 --- a/llvm/lib/Support/DataExtractor.cpp +++ b/llvm/lib/Support/DataExtractor.cpp @@ -75,7 +75,7 @@ uint32_t DataExtractor::getU32(uint32_t *offset_ptr) const { uint32_t *DataExtractor::getU32(uint32_t *offset_ptr, uint32_t *dst, uint32_t count) const { return getUs(offset_ptr, dst, count, this, IsLittleEndian, - Data.data());; + Data.data()); } uint64_t DataExtractor::getU64(uint32_t *offset_ptr) const { diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 88662a920384..2608685e045f 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -779,7 +779,7 @@ int64_t ARMBaseRegisterInfo:: getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const { const MCInstrDesc &Desc = MI->getDesc(); unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); - int64_t InstrOffs = 0;; + int64_t InstrOffs = 0; int Scale = 1; unsigned ImmIdx = 0; switch (AddrMode) { diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp index d1bfa574db2b..1c69f61d09ed 100644 --- a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -644,7 +644,7 @@ SDValue MSP430TargetLowering::LowerExternalSymbol(SDValue Op, const char *Sym = cast(Op)->getSymbol(); SDValue Result = DAG.getTargetExternalSymbol(Sym, getPointerTy()); - return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);; + return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result); } SDValue MSP430TargetLowering::LowerBlockAddress(SDValue Op, @@ -653,7 +653,7 @@ SDValue MSP430TargetLowering::LowerBlockAddress(SDValue Op, const BlockAddress *BA = cast(Op)->getBlockAddress(); SDValue Result = DAG.getBlockAddress(BA, getPointerTy(), /*isTarget=*/true); - return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);; + return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result); } static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC, diff --git a/llvm/lib/Target/X86/X86Subtarget.cpp b/llvm/lib/Target/X86/X86Subtarget.cpp index f1ef118881b3..3eb9441b9725 100644 --- a/llvm/lib/Target/X86/X86Subtarget.cpp +++ b/llvm/lib/Target/X86/X86Subtarget.cpp @@ -302,7 +302,7 @@ void X86Subtarget::AutoDetectSubtargetFeatures() { } // FIXME: AVX2 codegen support is not ready. //if ((EBX >> 5) & 0x1) { - // X86SSELevel = AVX2;; + // X86SSELevel = AVX2; // ToggleFeature(X86::FeatureAVX2); //} if ((EBX >> 8) & 0x1) { diff --git a/llvm/lib/VMCore/GCOV.cpp b/llvm/lib/VMCore/GCOV.cpp index fc7f96fccaaa..595c45235995 100644 --- a/llvm/lib/VMCore/GCOV.cpp +++ b/llvm/lib/VMCore/GCOV.cpp @@ -107,7 +107,7 @@ bool GCOVFunction::read(GCOVBuffer &Buff, GCOVFormat Format) { for (unsigned i = 0, e = Count; i != e; ++i) { Blocks[i]->addCount(Buff.readInt64()); } - return true;; + return true; } LineNumber = Buff.readInt();