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Add floating-point to and from integer conversion 

This patch add altivec support for v4i32 to v4f32 and for v4f32 to
v4i32 vector rounding conversion.

llvm-svn: 165409
This commit is contained in:
Adhemerval Zanella 2012-10-08 17:27:24 +00:00
parent 7a3d8209c3
commit 5c6e08435e
3 changed files with 93 additions and 0 deletions
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4
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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@ -373,6 +373,10 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
setOperationAction(ISD::LOAD , MVT::v4i32, Legal);
setOperationAction(ISD::SELECT, MVT::v4i32, Expand);
setOperationAction(ISD::STORE , MVT::v4i32, Legal);
setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Legal);
setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal);
setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Legal);
setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal);
addRegisterClass(MVT::v4f32, &PPC::VRRCRegClass);
addRegisterClass(MVT::v4i32, &PPC::VRRCRegClass);

32
llvm/lib/Target/PowerPC/PPCInstrAltivec.td
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@ -340,6 +340,28 @@ def VCTUXS : VXForm_1<906, (outs VRRC:$vD), (ins u5imm:$UIMM, VRRC:$vB),
"vctuxs $vD, $vB, $UIMM", VecFP,
[(set VRRC:$vD,
(int_ppc_altivec_vctuxs VRRC:$vB, imm:$UIMM))]>;
// Defines with the UIM field set to 0 for floating-point
// to integer (fp_to_sint/fp_to_uint) conversions and integer
// to floating-point (sint_to_fp/uint_to_fp) conversions.
let VA = 0 in {
def VCFSX_0 : VXForm_1<842, (outs VRRC:$vD), (ins VRRC:$vB),
"vcfsx $vD, $vB, 0", VecFP,
[(set VRRC:$vD,
(int_ppc_altivec_vcfsx VRRC:$vB, 0))]>;
def VCTUXS_0 : VXForm_1<906, (outs VRRC:$vD), (ins VRRC:$vB),
"vctuxs $vD, $vB, 0", VecFP,
[(set VRRC:$vD,
(int_ppc_altivec_vctuxs VRRC:$vB, 0))]>;
def VCFUX_0 : VXForm_1<778, (outs VRRC:$vD), (ins VRRC:$vB),
"vcfux $vD, $vB, 0", VecFP,
[(set VRRC:$vD,
(int_ppc_altivec_vcfux VRRC:$vB, 0))]>;
def VCTSXS_0 : VXForm_1<970, (outs VRRC:$vD), (ins VRRC:$vB),
"vctsxs $vD, $vB, 0", VecFP,
[(set VRRC:$vD,
(int_ppc_altivec_vctsxs VRRC:$vB, 0))]>;
}
def VEXPTEFP : VX2_Int<394, "vexptefp", int_ppc_altivec_vexptefp>;
def VLOGEFP : VX2_Int<458, "vlogefp", int_ppc_altivec_vlogefp>;
@ -689,3 +711,13 @@ def : Pat<(v8i16 (sra (v8i16 VRRC:$vA), (v8i16 VRRC:$vB))),
(v8i16 (VSRAH VRRC:$vA, VRRC:$vB))>;
def : Pat<(v4i32 (sra (v4i32 VRRC:$vA), (v4i32 VRRC:$vB))),
(v4i32 (VSRAW VRRC:$vA, VRRC:$vB))>;
// Float to integer and integer to float conversions
def : Pat<(v4i32 (fp_to_sint (v4f32 VRRC:$vA))),
(VCTSXS_0 VRRC:$vA)>;
def : Pat<(v4i32 (fp_to_uint (v4f32 VRRC:$vA))),
(VCTUXS_0 VRRC:$vA)>;
def : Pat<(v4f32 (sint_to_fp (v4i32 VRRC:$vA))),
(VCFSX_0 VRRC:$vA)>;
def : Pat<(v4f32 (uint_to_fp (v4i32 VRRC:$vA))),
(VCFUX_0 VRRC:$vA)>;

57
llvm/test/CodeGen/PowerPC/vec_conv.ll Normal file
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@ -0,0 +1,57 @@
; RUN: llc -mattr=+altivec < %s | FileCheck %s
; Check vector float/int conversion using altivec.
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
@cte_float = global <4 x float> <float 6.5e+00, float 6.5e+00, float 6.5e+00, float 6.5e+00>, align 16
@cte_int = global <4 x i32> <i32 6, i32 6, i32 6, i32 6>, align 16
define void @v4f32_to_v4i32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind {
entry:
%0 = load <4 x float>* @cte_float, align 16
%mul = fmul <4 x float> %0, %x
%1 = fptosi <4 x float> %mul to <4 x i32>
store <4 x i32> %1, <4 x i32>* %y, align 16
ret void
}
;CHECK: v4f32_to_v4i32:
;CHECK: vctsxs {{[0-9]+}}, {{[0-9]+}}, 0
define void @v4f32_to_v4u32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind {
entry:
%0 = load <4 x float>* @cte_float, align 16
%mul = fmul <4 x float> %0, %x
%1 = fptoui <4 x float> %mul to <4 x i32>
store <4 x i32> %1, <4 x i32>* %y, align 16
ret void
}
;CHECK: v4f32_to_v4u32:
;CHECK: vctuxs {{[0-9]+}}, {{[0-9]+}}, 0
define void @v4i32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind {
entry:
%0 = load <4 x i32>* @cte_int, align 16
%mul = mul <4 x i32> %0, %x
%1 = sitofp <4 x i32> %mul to <4 x float>
store <4 x float> %1, <4 x float>* %y, align 16
ret void
}
;CHECK: v4i32_to_v4f32:
;CHECK: vcfsx {{[0-9]+}}, {{[0-9]+}}, 0
define void @v4u32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind {
entry:
%0 = load <4 x i32>* @cte_int, align 16
%mul = mul <4 x i32> %0, %x
%1 = uitofp <4 x i32> %mul to <4 x float>
store <4 x float> %1, <4 x float>* %y, align 16
ret void
}
;CHECK: v4u32_to_v4f32:
;CHECK: vcfux {{[0-9]+}}, {{[0-9]+}}, 0