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Fix a bunch more alpha regressions 

llvm-svn: 24304
This commit is contained in:
Andrew Lenharth 2005-11-11 19:52:25 +00:00
parent 5278ca3fa2
commit 5b3b9d7052
1 changed files with 1 additions and 1 deletions
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2
llvm/lib/Target/Alpha/AlphaISelPattern.cpp
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@ -1533,7 +1533,7 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
N.getOperand(0).getValueType() == MVT::f32 &&
"only f32 to f64 conversion supported here");
Tmp1 = SelectExpr(N.getOperand(0));
BuildMI(BB, Alpha::CVTST, 1, Result).addReg(Alpha::F31).addReg(Tmp1);
BuildMI(BB, Alpha::CVTST, 1, Result).addReg(Tmp1);
return Result;
case ISD::ConstantFP: