diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 3e75f7b3056f..3d5a126df1b8 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1244,8 +1244,8 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
     unsigned TrailZ = KnownZero.countTrailingOnes() +
                       KnownZero2.countTrailingOnes();
     unsigned LeadZ =  std::max(KnownZero.countLeadingOnes() +
-                               KnownZero2.countLeadingOnes() +
-                               1, BitWidth) - BitWidth;
+                               KnownZero2.countLeadingOnes(),
+                               BitWidth) - BitWidth;
 
     TrailZ = std::min(TrailZ, BitWidth);
     LeadZ = std::min(LeadZ, BitWidth);
diff --git a/llvm/lib/Transforms/Scalar/InstructionCombining.cpp b/llvm/lib/Transforms/Scalar/InstructionCombining.cpp
index 2afa6c51622c..66d5326b9f34 100644
--- a/llvm/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -767,8 +767,8 @@ void InstCombiner::ComputeMaskedBits(Value *V, const APInt &Mask,
     unsigned TrailZ = KnownZero.countTrailingOnes() +
                       KnownZero2.countTrailingOnes();
     unsigned LeadZ =  std::max(KnownZero.countLeadingOnes() +
-                               KnownZero2.countLeadingOnes() +
-                               1, BitWidth) - BitWidth;
+                               KnownZero2.countLeadingOnes(),
+                               BitWidth) - BitWidth;
 
     TrailZ = std::min(TrailZ, BitWidth);
     LeadZ = std::min(LeadZ, BitWidth);
diff --git a/llvm/test/Transforms/InstCombine/mul-masked-bits.ll b/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
new file mode 100644
index 000000000000..9b0a5bfe20de
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep ashr
+
+define i32 @foo(i32 %x, i32 %y) {
+  %a = and i32 %x, 7
+  %b = and i32 %y, 7
+  %c = mul i32 %a, %b
+  %d = shl i32 %c, 26
+  %e = ashr i32 %d, 26
+  ret i32 %e
+}