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Remove support for DIVariable's FlagIndirectVariable and expect 

frontends to use a DIExpression with a DW_OP_deref instead.

This is not only a much more natural place for this informationl; there
is also a technical reason: The FlagIndirectVariable is used to mark a
variable that is turned into a reference by virtue of the calling
convention; this happens for example to aggregate return values.
The inliner, for example, may actually need to undo this indirection to
correctly represent the value in its new context. This is impossible to
implement because the DIVariable can't be safely modified. We can however
safely construct a new DIExpression on the fly.

llvm-svn: 226476
This commit is contained in:
Adrian Prantl 2015-01-19 17:57:29 +00:00
parent 7c6f944cdf
commit 5883af3faa
18 changed files with 45 additions and 69 deletions
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4
llvm/include/llvm/CodeGen/AsmPrinter.h
View File

@ -431,8 +431,8 @@ public:
/// EmitDwarfRegOp - Emit a dwarf register operation. /// EmitDwarfRegOp - Emit a dwarf register operation.
/// \param Indirect whether this is a register-indirect address /// \param Indirect whether this is a register-indirect address
virtual void EmitDwarfRegOp(ByteStreamer &BS, const MachineLocation &MLoc, virtual void EmitDwarfRegOp(ByteStreamer &BS,
bool Indirect) const; const MachineLocation &MLoc) const;
//===------------------------------------------------------------------===// //===------------------------------------------------------------------===//
// Dwarf Lowering Routines // Dwarf Lowering Routines

10
llvm/include/llvm/IR/DebugInfo.h
View File

@ -138,9 +138,8 @@ public:
FlagObjectPointer = 1 << 10, FlagObjectPointer = 1 << 10,
FlagVector = 1 << 11, FlagVector = 1 << 11,
FlagStaticMember = 1 << 12, FlagStaticMember = 1 << 12,
FlagIndirectVariable = 1 << 13, FlagLValueReference = 1 << 13,
FlagLValueReference = 1 << 14, FlagRValueReference = 1 << 14
FlagRValueReference = 1 << 15
}; };
protected: protected:
@ -816,11 +815,6 @@ public:
return (getHeaderFieldAs<unsigned>(3) & FlagObjectPointer) != 0; return (getHeaderFieldAs<unsigned>(3) & FlagObjectPointer) != 0;
} }
/// \brief Return true if this variable is represented as a pointer.
bool isIndirect() const {
return (getHeaderFieldAs<unsigned>(3) & FlagIndirectVariable) != 0;
}
/// \brief If this variable is inlined then return inline location. /// \brief If this variable is inlined then return inline location.
MDNode *getInlinedAt() const; MDNode *getInlinedAt() const;

9
llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
View File

@ -228,14 +228,13 @@ void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
/// EmitDwarfRegOp - Emit dwarf register operation. /// EmitDwarfRegOp - Emit dwarf register operation.
void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer, void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
const MachineLocation &MLoc, const MachineLocation &MLoc) const {
bool Indirect) const {
DebugLocDwarfExpression Expr(*this, Streamer); DebugLocDwarfExpression Expr(*this, Streamer);
const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo(); const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false); int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
if (Reg < 0) { if (Reg < 0) {
// We assume that pointers are always in an addressable register. // We assume that pointers are always in an addressable register.
if (Indirect || MLoc.isIndirect()) if (MLoc.isIndirect())
// FIXME: We have no reasonable way of handling errors in here. The // FIXME: We have no reasonable way of handling errors in here. The
// caller might be in the middle of a dwarf expression. We should // caller might be in the middle of a dwarf expression. We should
// probably assert that Reg >= 0 once debug info generation is more // probably assert that Reg >= 0 once debug info generation is more
@ -251,9 +250,7 @@ void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
} }
if (MLoc.isIndirect()) if (MLoc.isIndirect())
Expr.AddRegIndirect(Reg, MLoc.getOffset(), Indirect); Expr.AddRegIndirect(Reg, MLoc.getOffset());
else if (Indirect)
Expr.AddRegIndirect(Reg, 0, false);
else else
Expr.AddReg(Reg); Expr.AddReg(Reg);
} }

23
llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
View File

@ -737,18 +737,16 @@ void DwarfCompileUnit::addVariableAddress(const DbgVariable &DV, DIE &Die,
else if (DV.isBlockByrefVariable()) else if (DV.isBlockByrefVariable())
addBlockByrefAddress(DV, Die, dwarf::DW_AT_location, Location); addBlockByrefAddress(DV, Die, dwarf::DW_AT_location, Location);
else else
addAddress(Die, dwarf::DW_AT_location, Location, addAddress(Die, dwarf::DW_AT_location, Location);
DV.getVariable().isIndirect());
} }
/// Add an address attribute to a die based on the location provided. /// Add an address attribute to a die based on the location provided.
void DwarfCompileUnit::addAddress(DIE &Die, dwarf::Attribute Attribute, void DwarfCompileUnit::addAddress(DIE &Die, dwarf::Attribute Attribute,
const MachineLocation &Location, const MachineLocation &Location) {
bool Indirect) {
DIELoc *Loc = new (DIEValueAllocator) DIELoc(); DIELoc *Loc = new (DIEValueAllocator) DIELoc();
bool validReg; bool validReg;
if (Location.isReg() && !Indirect) if (Location.isReg())
validReg = addRegisterOpPiece(*Loc, Location.getReg()); validReg = addRegisterOpPiece(*Loc, Location.getReg());
else else
validReg = addRegisterOffset(*Loc, Location.getReg(), Location.getOffset()); validReg = addRegisterOffset(*Loc, Location.getReg(), Location.getOffset());
@ -756,9 +754,6 @@ void DwarfCompileUnit::addAddress(DIE &Die, dwarf::Attribute Attribute,
if (!validReg) if (!validReg)
return; return;
if (!Location.isReg() && Indirect)
addUInt(*Loc, dwarf::DW_FORM_data1, dwarf::DW_OP_deref);
// Now attach the location information to the DIE. // Now attach the location information to the DIE.
addBlock(Die, Attribute, Loc); addBlock(Die, Attribute, Loc);
} }
@ -775,16 +770,10 @@ void DwarfCompileUnit::addComplexAddress(const DbgVariable &DV, DIE &Die,
DIExpression Expr = DV.getExpression(); DIExpression Expr = DV.getExpression();
if (Location.getOffset()) { if (Location.getOffset()) {
if (DwarfExpr.AddMachineRegIndirect(Location.getReg(), if (DwarfExpr.AddMachineRegIndirect(Location.getReg(),
Location.getOffset())) { Location.getOffset()))
DwarfExpr.AddExpression(Expr); DwarfExpr.AddExpression(Expr);
assert(!DV.getVariable().isIndirect() } else
&& "double indirection not handled"); DwarfExpr.AddMachineRegExpression(Expr, Location.getReg());
}
} else {
if (DwarfExpr.AddMachineRegExpression(Expr, Location.getReg()))
if (DV.getVariable().isIndirect())
DwarfExpr.EmitOp(dwarf::DW_OP_deref);
}
// Now attach the location information to the DIE. // Now attach the location information to the DIE.
addBlock(Die, Attribute, Loc); addBlock(Die, Attribute, Loc);

2
llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
View File

@ -213,7 +213,7 @@ public:
MachineLocation Location); MachineLocation Location);
/// Add an address attribute to a die based on the location provided. /// Add an address attribute to a die based on the location provided.
void addAddress(DIE &Die, dwarf::Attribute Attribute, void addAddress(DIE &Die, dwarf::Attribute Attribute,
const MachineLocation &Location, bool Indirect = false); const MachineLocation &Location);
/// Start with the address based on the location provided, and generate the /// Start with the address based on the location provided, and generate the
/// DWARF information necessary to find the actual variable (navigating the /// DWARF information necessary to find the actual variable (navigating the

6
llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
View File

@ -1683,14 +1683,12 @@ void DwarfDebug::emitLocPieces(ByteStreamer &Streamer,
#ifndef NDEBUG #ifndef NDEBUG
DIVariable Var = Piece.getVariable(); DIVariable Var = Piece.getVariable();
assert(!Var.isIndirect() && "indirect address for piece");
unsigned VarSize = Var.getSizeInBits(Map); unsigned VarSize = Var.getSizeInBits(Map);
assert(PieceSize+PieceOffset <= VarSize/SizeOfByte assert(PieceSize+PieceOffset <= VarSize/SizeOfByte
&& "piece is larger than or outside of variable"); && "piece is larger than or outside of variable");
assert(PieceSize*SizeOfByte != VarSize assert(PieceSize*SizeOfByte != VarSize
&& "piece covers entire variable"); && "piece covers entire variable");
#endif #endif
emitDebugLocValue(Streamer, Piece, PieceOffset*SizeOfByte); emitDebugLocValue(Streamer, Piece, PieceOffset*SizeOfByte);
} }
} }
@ -1726,7 +1724,7 @@ void DwarfDebug::emitDebugLocValue(ByteStreamer &Streamer,
DIExpression Expr = Value.getExpression(); DIExpression Expr = Value.getExpression();
if (!Expr || (Expr.getNumElements() == 0)) if (!Expr || (Expr.getNumElements() == 0))
// Regular entry. // Regular entry.
Asm->EmitDwarfRegOp(Streamer, Loc, DV.isIndirect()); Asm->EmitDwarfRegOp(Streamer, Loc);
else { else {
// Complex address entry. // Complex address entry.
if (Loc.getOffset()) { if (Loc.getOffset()) {
@ -1735,8 +1733,6 @@ void DwarfDebug::emitDebugLocValue(ByteStreamer &Streamer,
} else } else
DwarfExpr.AddMachineRegExpression(Expr, Loc.getReg(), DwarfExpr.AddMachineRegExpression(Expr, Loc.getReg(),
PieceOffsetInBits); PieceOffsetInBits);
if (DV.isIndirect())
DwarfExpr.EmitOp(dwarf::DW_OP_deref);
} }
} }
// else ... ignore constant fp. There is not any good way to // else ... ignore constant fp. There is not any good way to

4
llvm/test/DebugInfo/AArch64/struct_by_value.ll
View File

@ -32,7 +32,7 @@ target triple = "arm64-apple-ios3.0.0"
; Function Attrs: nounwind ssp ; Function Attrs: nounwind ssp
define i32 @return_five_int(%struct.five* %f) #0 { define i32 @return_five_int(%struct.five* %f) #0 {
entry: entry:
call void @llvm.dbg.declare(metadata %struct.five* %f, metadata !17, metadata !{!"0x102"}), !dbg !18 call void @llvm.dbg.declare(metadata %struct.five* %f, metadata !17, metadata !{!"0x102\006"}), !dbg !18
%a = getelementptr inbounds %struct.five* %f, i32 0, i32 0, !dbg !19 %a = getelementptr inbounds %struct.five* %f, i32 0, i32 0, !dbg !19
%0 = load i32* %a, align 4, !dbg !19 %0 = load i32* %a, align 4, !dbg !19
ret i32 %0, !dbg !19 ret i32 %0, !dbg !19
@ -64,7 +64,7 @@ attributes #1 = { nounwind readnone }
!14 = !{!"0xd\00d\006\0032\0032\0096\000", !1, !9, !8} ; [ DW_TAG_member ] [d] [line 6, size 32, align 32, offset 96] [from int] !14 = !{!"0xd\00d\006\0032\0032\0096\000", !1, !9, !8} ; [ DW_TAG_member ] [d] [line 6, size 32, align 32, offset 96] [from int]
!15 = !{!"0xd\00e\007\0032\0032\00128\000", !1, !9, !8} ; [ DW_TAG_member ] [e] [line 7, size 32, align 32, offset 128] [from int] !15 = !{!"0xd\00e\007\0032\0032\00128\000", !1, !9, !8} ; [ DW_TAG_member ] [e] [line 7, size 32, align 32, offset 128] [from int]
!16 = !{i32 2, !"Dwarf Version", i32 2} !16 = !{i32 2, !"Dwarf Version", i32 2}
!17 = !{!"0x101\00f\0016777229\008192", !4, !5, !9} ; [ DW_TAG_arg_variable ] [f] [line 13] !17 = !{!"0x101\00f\0016777229\000", !4, !5, !9} ; [ DW_TAG_arg_variable ] [f] [line 13]
!18 = !MDLocation(line: 13, scope: !4) !18 = !MDLocation(line: 13, scope: !4)
!19 = !MDLocation(line: 16, scope: !4) !19 = !MDLocation(line: 16, scope: !4)
!20 = !{i32 1, !"Debug Info Version", i32 2} !20 = !{i32 1, !"Debug Info Version", i32 2}

4
llvm/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll
View File

@ -23,7 +23,7 @@ entry:
%conv = fptosi float %r to i32, !dbg !23 %conv = fptosi float %r to i32, !dbg !23
tail call void @llvm.dbg.declare(metadata i32 %conv, metadata !12, metadata !{!"0x102"}), !dbg !23 tail call void @llvm.dbg.declare(metadata i32 %conv, metadata !12, metadata !{!"0x102"}), !dbg !23
%vla = alloca float, i32 %conv, align 4, !dbg !24 %vla = alloca float, i32 %conv, align 4, !dbg !24
tail call void @llvm.dbg.declare(metadata float* %vla, metadata !14, metadata !{!"0x102"}), !dbg !24 tail call void @llvm.dbg.declare(metadata float* %vla, metadata !14, metadata !{!"0x102\006"}), !dbg !24
; The VLA alloca should be described by a dbg.declare: ; The VLA alloca should be described by a dbg.declare:
; CHECK: call void @llvm.dbg.declare(metadata float* %vla, metadata ![[VLA:.*]], metadata {{.*}}) ; CHECK: call void @llvm.dbg.declare(metadata float* %vla, metadata ![[VLA:.*]], metadata {{.*}})
; The VLA alloca and following store into the array should not be lowered to like this: ; The VLA alloca and following store into the array should not be lowered to like this:
@ -81,7 +81,7 @@ attributes #1 = { nounwind readnone }
!11 = !{!"0x101\00r\0016777217\000", !4, !6, !9} ; [ DW_TAG_arg_variable ] [r] [line 1] !11 = !{!"0x101\00r\0016777217\000", !4, !6, !9} ; [ DW_TAG_arg_variable ] [r] [line 1]
!12 = !{!"0x100\00count\003\000", !4, !6, !13} ; [ DW_TAG_auto_variable ] [count] [line 3] !12 = !{!"0x100\00count\003\000", !4, !6, !13} ; [ DW_TAG_auto_variable ] [count] [line 3]
!13 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !13 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
!14 = !{!"0x100\00vla\004\008192", !4, !6, !15} ; [ DW_TAG_auto_variable ] [vla] [line 4] !14 = !{!"0x100\00vla\004\000", !4, !6, !15} ; [ DW_TAG_auto_variable ] [vla] [line 4]
!15 = !{!"0x1\00\000\000\0032\000\000", null, null, !9, !16, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from float] !15 = !{!"0x1\00\000\000\0032\000\000", null, null, !9, !16, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from float]
!16 = !{!17} !16 = !{!17}
!17 = !{!"0x21\000\00-1"} ; [ DW_TAG_subrange_type ] [unbounded] !17 = !{!"0x21\000\00-1"} ; [ DW_TAG_subrange_type ] [unbounded]

4
llvm/test/DebugInfo/ARM/selectiondag-deadcode.ll
View File

@ -13,7 +13,7 @@ _ZN7Vector39NormalizeEv.exit: ; preds = %1, %0
; and SelectionDAGISel crashes. It should definitely not ; and SelectionDAGISel crashes. It should definitely not
; crash. Drop the dbg_value instead. ; crash. Drop the dbg_value instead.
; CHECK-NOT: "matrix" ; CHECK-NOT: "matrix"
tail call void @llvm.dbg.declare(metadata %class.Matrix3.0.6.10* %agg.result, metadata !45, metadata !{!"0x102"}) tail call void @llvm.dbg.declare(metadata %class.Matrix3.0.6.10* %agg.result, metadata !45, metadata !{!"0x102\006"})
%2 = getelementptr inbounds %class.Matrix3.0.6.10* %agg.result, i32 0, i32 0, i32 8 %2 = getelementptr inbounds %class.Matrix3.0.6.10* %agg.result, i32 0, i32 0, i32 8
ret void ret void
} }
@ -24,4 +24,4 @@ declare arm_aapcscc void @_ZL4Sqrtd() #2
!39 = !{!"0x2e\00GetMatrix\00GetMatrix\00_Z9GetMatrixv\0032\000\001\000\006\00256\001\0032", !5, !40, !41, null, void (%class.Matrix3.0.6.10*)* @_Z9GetMatrixv, null, null, null} ; [ DW_TAG_subprogram ] [line 32] [def] [GetMatrix] !39 = !{!"0x2e\00GetMatrix\00GetMatrix\00_Z9GetMatrixv\0032\000\001\000\006\00256\001\0032", !5, !40, !41, null, void (%class.Matrix3.0.6.10*)* @_Z9GetMatrixv, null, null, null} ; [ DW_TAG_subprogram ] [line 32] [def] [GetMatrix]
!40 = !{!"0x29", !5} ; [ DW_TAG_file_type ] [/Volumes/Data/radar/15094721/test.ii] !40 = !{!"0x29", !5} ; [ DW_TAG_file_type ] [/Volumes/Data/radar/15094721/test.ii]
!41 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, null, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !41 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, null, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
!45 = !{!"0x100\00matrix\0035\008192", !39, !40, !4} ; [ DW_TAG_auto_variable ] [matrix] [line 35] !45 = !{!"0x100\00matrix\0035\000", !39, !40, !4} ; [ DW_TAG_auto_variable ] [matrix] [line 35]

4
llvm/test/DebugInfo/X86/dbg_value_direct.ll
View File

@ -70,7 +70,7 @@ entry:
; <label>:28 ; preds = %22, %entry ; <label>:28 ; preds = %22, %entry
store i32 %0, i32* %3, align 4 store i32 %0, i32* %3, align 4
call void @llvm.dbg.declare(metadata %struct.A* %agg.result, metadata !24, metadata !{!"0x102"}), !dbg !25 call void @llvm.dbg.declare(metadata %struct.A* %agg.result, metadata !24, metadata !{!"0x102\006"}), !dbg !25
call void @_ZN1AC1Ev(%struct.A* %agg.result), !dbg !25 call void @_ZN1AC1Ev(%struct.A* %agg.result), !dbg !25
store i64 1172321806, i64* %4, !dbg !26 store i64 1172321806, i64* %4, !dbg !26
%29 = inttoptr i64 %10 to i32*, !dbg !26 %29 = inttoptr i64 %10 to i32*, !dbg !26
@ -171,7 +171,7 @@ attributes #2 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "n
!21 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !21 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
!22 = !{i32 2, !"Dwarf Version", i32 3} !22 = !{i32 2, !"Dwarf Version", i32 3}
!23 = !{!"0x101\00\0016777222\000", !4, !5, !21} ; [ DW_TAG_arg_variable ] [line 6] !23 = !{!"0x101\00\0016777222\000", !4, !5, !21} ; [ DW_TAG_arg_variable ] [line 6]
!24 = !{!"0x100\00a\007\008192", !4, !5, !8} ; [ DW_TAG_auto_variable ] [a] [line 7] !24 = !{!"0x100\00a\007\000", !4, !5, !8} ; [ DW_TAG_auto_variable ] [a] [line 7]
!25 = !MDLocation(line: 7, scope: !4) !25 = !MDLocation(line: 7, scope: !4)
!26 = !MDLocation(line: 8, scope: !4) !26 = !MDLocation(line: 8, scope: !4)
!27 = !{i32 1, !"Debug Info Version", i32 2} !27 = !{i32 1, !"Debug Info Version", i32 2}

4
llvm/test/DebugInfo/X86/debug-loc-offset.ll
View File

@ -76,7 +76,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
define void @_Z3baz1A(%struct.A* %a) #2 { define void @_Z3baz1A(%struct.A* %a) #2 {
entry: entry:
%z = alloca i32, align 4 %z = alloca i32, align 4
call void @llvm.dbg.declare(metadata %struct.A* %a, metadata !24, metadata !{!"0x102"}), !dbg !25 call void @llvm.dbg.declare(metadata %struct.A* %a, metadata !24, metadata !{!"0x102\006"}), !dbg !25
call void @llvm.dbg.declare(metadata i32* %z, metadata !26, metadata !{!"0x102"}), !dbg !27 call void @llvm.dbg.declare(metadata i32* %z, metadata !26, metadata !{!"0x102"}), !dbg !27
store i32 2, i32* %z, align 4, !dbg !27 store i32 2, i32* %z, align 4, !dbg !27
%var = getelementptr inbounds %struct.A* %a, i32 0, i32 1, !dbg !28 %var = getelementptr inbounds %struct.A* %a, i32 0, i32 1, !dbg !28
@ -140,7 +140,7 @@ attributes #2 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "n
!21 = !{!"0x101\00b\0016777217\000", !4, !5, !8} ; [ DW_TAG_arg_variable ] [b] [line 1] !21 = !{!"0x101\00b\0016777217\000", !4, !5, !8} ; [ DW_TAG_arg_variable ] [b] [line 1]
!22 = !MDLocation(line: 1, scope: !4) !22 = !MDLocation(line: 1, scope: !4)
!23 = !MDLocation(line: 2, scope: !4) !23 = !MDLocation(line: 2, scope: !4)
!24 = !{!"0x101\00a\0016777222\008192", !14, !15, !"_ZTS1A"} ; [ DW_TAG_arg_variable ] [a] [line 6] !24 = !{!"0x101\00a\0016777222\000", !14, !15, !"_ZTS1A"} ; [ DW_TAG_arg_variable ] [a] [line 6]
!25 = !MDLocation(line: 6, scope: !14) !25 = !MDLocation(line: 6, scope: !14)
!26 = !{!"0x100\00z\007\000", !14, !15, !8} ; [ DW_TAG_auto_variable ] [z] [line 7] !26 = !{!"0x100\00z\007\000", !14, !15, !8} ; [ DW_TAG_auto_variable ] [z] [line 7]
!27 = !MDLocation(line: 7, scope: !14) !27 = !MDLocation(line: 7, scope: !14)

4
llvm/test/DebugInfo/X86/op_deref.ll
View File

@ -92,7 +92,7 @@ declare void @llvm.stackrestore(i8*) nounwind
!11 = !MDLocation(line: 1, column: 26, scope: !5) !11 = !MDLocation(line: 1, column: 26, scope: !5)
!12 = !MDLocation(line: 3, column: 13, scope: !13) !12 = !MDLocation(line: 3, column: 13, scope: !13)
!13 = !{!"0xb\002\001\000", !28, !5} ; [ DW_TAG_lexical_block ] !13 = !{!"0xb\002\001\000", !28, !5} ; [ DW_TAG_lexical_block ]
!14 = !{!"0x100\00vla\003\008192", !13, !6, !15} ; [ DW_TAG_auto_variable ] !14 = !{!"0x100\00vla\003\000", !13, !6, !15} ; [ DW_TAG_auto_variable ]
!15 = !{!"0x1\00\000\000\0032\000\000", null, null, !9, !16, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int] !15 = !{!"0x1\00\000\000\0032\000\000", null, null, !9, !16, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int]
!16 = !{!17} !16 = !{!17}
!17 = !{!"0x21\000\00-1"} ; [ DW_TAG_subrange_type ] !17 = !{!"0x21\000\00-1"} ; [ DW_TAG_subrange_type ]
@ -108,4 +108,4 @@ declare void @llvm.stackrestore(i8*) nounwind
!27 = !MDLocation(line: 8, column: 1, scope: !13) !27 = !MDLocation(line: 8, column: 1, scope: !13)
!28 = !{!"bar.c", !"/Users/echristo/tmp"} !28 = !{!"bar.c", !"/Users/echristo/tmp"}
!29 = !{i32 1, !"Debug Info Version", i32 2} !29 = !{i32 1, !"Debug Info Version", i32 2}
!30 = !{!"0x102\006"} ; [ DW_TAG_expression ] [DW_OP_deref] !30 = !{!"0x102\006\006"} ; [ DW_TAG_expression ] [DW_OP_deref]

8
llvm/test/DebugInfo/X86/parameters.ll
View File

@ -42,7 +42,7 @@
; Function Attrs: uwtable ; Function Attrs: uwtable
define void @_ZN7pr147634funcENS_3fooE(%"struct.pr14763::foo"* noalias sret %agg.result, %"struct.pr14763::foo"* %f) #0 { define void @_ZN7pr147634funcENS_3fooE(%"struct.pr14763::foo"* noalias sret %agg.result, %"struct.pr14763::foo"* %f) #0 {
entry: entry:
call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %f, metadata !22, metadata !{!"0x102"}), !dbg !24 call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %f, metadata !22, metadata !{!"0x102\006"}), !dbg !24
call void @_ZN7pr147633fooC1ERKS0_(%"struct.pr14763::foo"* %agg.result, %"struct.pr14763::foo"* %f), !dbg !25 call void @_ZN7pr147633fooC1ERKS0_(%"struct.pr14763::foo"* %agg.result, %"struct.pr14763::foo"* %f), !dbg !25
ret void, !dbg !25 ret void, !dbg !25
} }
@ -59,7 +59,7 @@ entry:
%frombool = zext i1 %b to i8 %frombool = zext i1 %b to i8
store i8 %frombool, i8* %b.addr, align 1 store i8 %frombool, i8* %b.addr, align 1
call void @llvm.dbg.declare(metadata i8* %b.addr, metadata !26, metadata !{!"0x102"}), !dbg !27 call void @llvm.dbg.declare(metadata i8* %b.addr, metadata !26, metadata !{!"0x102"}), !dbg !27
call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %g, metadata !28, metadata !{!"0x102"}), !dbg !27 call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %g, metadata !28, metadata !{!"0x102\006"}), !dbg !27
%0 = load i8* %b.addr, align 1, !dbg !29 %0 = load i8* %b.addr, align 1, !dbg !29
%tobool = trunc i8 %0 to i1, !dbg !29 %tobool = trunc i8 %0 to i1, !dbg !29
br i1 %tobool, label %if.then, label %if.end, !dbg !29 br i1 %tobool, label %if.then, label %if.end, !dbg !29
@ -104,13 +104,13 @@ attributes #2 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "n
!19 = !{null, !20, !8} !19 = !{null, !20, !8}
!20 = !{!"0x24\00bool\000\008\008\000\000\002", null, null} ; [ DW_TAG_base_type ] [bool] [line 0, size 8, align 8, offset 0, enc DW_ATE_boolean] !20 = !{!"0x24\00bool\000\008\008\000\000\002", null, null} ; [ DW_TAG_base_type ] [bool] [line 0, size 8, align 8, offset 0, enc DW_ATE_boolean]
!21 = !{i32 2, !"Dwarf Version", i32 3} !21 = !{i32 2, !"Dwarf Version", i32 3}
!22 = !{!"0x101\00f\0016777222\008192", !4, !23, !8} ; [ DW_TAG_arg_variable ] [f] [line 6] !22 = !{!"0x101\00f\0016777222\000", !4, !23, !8} ; [ DW_TAG_arg_variable ] [f] [line 6]
!23 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [/tmp/pass.cpp] !23 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [/tmp/pass.cpp]
!24 = !MDLocation(line: 6, scope: !4) !24 = !MDLocation(line: 6, scope: !4)
!25 = !MDLocation(line: 7, scope: !4) !25 = !MDLocation(line: 7, scope: !4)
!26 = !{!"0x101\00b\0016777228\000", !17, !23, !20} ; [ DW_TAG_arg_variable ] [b] [line 12] !26 = !{!"0x101\00b\0016777228\000", !17, !23, !20} ; [ DW_TAG_arg_variable ] [b] [line 12]
!27 = !MDLocation(line: 12, scope: !17) !27 = !MDLocation(line: 12, scope: !17)
!28 = !{!"0x101\00g\0033554444\008192", !17, !23, !8} ; [ DW_TAG_arg_variable ] [g] [line 12] !28 = !{!"0x101\00g\0033554444\000", !17, !23, !8} ; [ DW_TAG_arg_variable ] [g] [line 12]
!29 = !MDLocation(line: 13, scope: !30) !29 = !MDLocation(line: 13, scope: !30)
!30 = !{!"0xb\0013\000\000", !1, !17} ; [ DW_TAG_lexical_block ] [/tmp/pass.cpp] !30 = !{!"0xb\0013\000\000", !1, !17} ; [ DW_TAG_lexical_block ] [/tmp/pass.cpp]
!31 = !MDLocation(line: 14, scope: !30) !31 = !MDLocation(line: 14, scope: !30)

4
llvm/test/DebugInfo/X86/pr19307.ll
View File

@ -43,7 +43,7 @@ entry:
call void @llvm.dbg.declare(metadata i64** %offset.addr, metadata !45, metadata !{!"0x102"}), !dbg !46 call void @llvm.dbg.declare(metadata i64** %offset.addr, metadata !45, metadata !{!"0x102"}), !dbg !46
store i64* %limit, i64** %limit.addr, align 8 store i64* %limit, i64** %limit.addr, align 8
call void @llvm.dbg.declare(metadata i64** %limit.addr, metadata !47, metadata !{!"0x102"}), !dbg !46 call void @llvm.dbg.declare(metadata i64** %limit.addr, metadata !47, metadata !{!"0x102"}), !dbg !46
call void @llvm.dbg.declare(metadata %"class.std::basic_string"* %range, metadata !48, metadata !{!"0x102"}), !dbg !49 call void @llvm.dbg.declare(metadata %"class.std::basic_string"* %range, metadata !48, metadata !{!"0x102\006"}), !dbg !49
%call = call i32 @_ZNKSs7compareEmmPKc(%"class.std::basic_string"* %range, i64 0, i64 6, i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0)), !dbg !50 %call = call i32 @_ZNKSs7compareEmmPKc(%"class.std::basic_string"* %range, i64 0, i64 6, i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0)), !dbg !50
%cmp = icmp ne i32 %call, 0, !dbg !50 %cmp = icmp ne i32 %call, 0, !dbg !50
br i1 %cmp, label %if.then, label %lor.lhs.false, !dbg !50 br i1 %cmp, label %if.then, label %lor.lhs.false, !dbg !50
@ -132,7 +132,7 @@ attributes #2 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "n
!45 = !{!"0x101\00offset\0016777219\000", !13, !14, !17} ; [ DW_TAG_arg_variable ] [offset] [line 3] !45 = !{!"0x101\00offset\0016777219\000", !13, !14, !17} ; [ DW_TAG_arg_variable ] [offset] [line 3]
!46 = !MDLocation(line: 3, scope: !13) !46 = !MDLocation(line: 3, scope: !13)
!47 = !{!"0x101\00limit\0033554435\000", !13, !14, !17} ; [ DW_TAG_arg_variable ] [limit] [line 3] !47 = !{!"0x101\00limit\0033554435\000", !13, !14, !17} ; [ DW_TAG_arg_variable ] [limit] [line 3]
!48 = !{!"0x101\00range\0050331652\008192", !13, !14, !19} ; [ DW_TAG_arg_variable ] [range] [line 4] !48 = !{!"0x101\00range\0050331652\000", !13, !14, !19} ; [ DW_TAG_arg_variable ] [range] [line 4]
!49 = !MDLocation(line: 4, scope: !13) !49 = !MDLocation(line: 4, scope: !13)
!50 = !MDLocation(line: 5, scope: !51) !50 = !MDLocation(line: 5, scope: !51)
!51 = !{!"0xb\005\000\000", !1, !13} ; [ DW_TAG_lexical_block ] [/llvm_cmake_gcc/pr19307.cc] !51 = !{!"0xb\005\000\000", !1, !13} ; [ DW_TAG_lexical_block ] [/llvm_cmake_gcc/pr19307.cc]

4
llvm/test/DebugInfo/X86/reference-argument.ll
View File

@ -21,7 +21,7 @@ entry:
%this.addr = alloca %class.A*, align 8 %this.addr = alloca %class.A*, align 8
store %class.A* %this, %class.A** %this.addr, align 8 store %class.A* %this, %class.A** %this.addr, align 8
call void @llvm.dbg.declare(metadata %class.A** %this.addr, metadata !59, metadata !{!"0x102"}), !dbg !61 call void @llvm.dbg.declare(metadata %class.A** %this.addr, metadata !59, metadata !{!"0x102"}), !dbg !61
call void @llvm.dbg.declare(metadata %class.SVal* %v, metadata !62, metadata !{!"0x102"}), !dbg !61 call void @llvm.dbg.declare(metadata %class.SVal* %v, metadata !62, metadata !{!"0x102\006"}), !dbg !61
%this1 = load %class.A** %this.addr %this1 = load %class.A** %this.addr
call void @_Z3barR4SVal(%class.SVal* %v), !dbg !61 call void @_Z3barR4SVal(%class.SVal* %v), !dbg !61
ret void, !dbg !61 ret void, !dbg !61
@ -94,7 +94,7 @@ declare void @_ZN4SValD2Ev(%class.SVal* %this)
!59 = !{!"0x101\00this\0016777238\001088", !35, !5, !60} ; [ DW_TAG_arg_variable ] [this] [line 22] !59 = !{!"0x101\00this\0016777238\001088", !35, !5, !60} ; [ DW_TAG_arg_variable ] [this] [line 22]
!60 = !{!"0xf\00\000\0064\0064\000\000", null, null, !39} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from A] !60 = !{!"0xf\00\000\0064\0064\000\000", null, null, !39} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from A]
!61 = !MDLocation(line: 22, scope: !35) !61 = !MDLocation(line: 22, scope: !35)
!62 = !{!"0x101\00v\0033554454\008192", !35, !5, !9} ; [ DW_TAG_arg_variable ] [v] [line 22] !62 = !{!"0x101\00v\0033554454\000", !35, !5, !9} ; [ DW_TAG_arg_variable ] [v] [line 22]
!63 = !{!"0x101\00this\0016777230\001088", !33, !5, !64} ; [ DW_TAG_arg_variable ] [this] [line 14] !63 = !{!"0x101\00this\0016777230\001088", !33, !5, !64} ; [ DW_TAG_arg_variable ] [this] [line 14]
!64 = !{!"0xf\00\000\0064\0064\000\000", null, null, !9} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from SVal] !64 = !{!"0xf\00\000\0064\0064\000\000", null, null, !9} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from SVal]
!65 = !MDLocation(line: 14, scope: !33) !65 = !MDLocation(line: 14, scope: !33)

4
llvm/test/DebugInfo/X86/sret.ll
View File

@ -98,7 +98,7 @@ entry:
call void @llvm.dbg.declare(metadata %class.B** %this.addr, metadata !89, metadata !{!"0x102"}), !dbg !91 call void @llvm.dbg.declare(metadata %class.B** %this.addr, metadata !89, metadata !{!"0x102"}), !dbg !91
%this1 = load %class.B** %this.addr %this1 = load %class.B** %this.addr
store i1 false, i1* %nrvo, !dbg !92 store i1 false, i1* %nrvo, !dbg !92
call void @llvm.dbg.declare(metadata %class.A* %agg.result, metadata !93, metadata !{!"0x102"}), !dbg !92 call void @llvm.dbg.declare(metadata %class.A* %agg.result, metadata !93, metadata !{!"0x102\006"}), !dbg !92
call void @_ZN1AC1Ei(%class.A* %agg.result, i32 12), !dbg !92 call void @_ZN1AC1Ei(%class.A* %agg.result, i32 12), !dbg !92
store i1 true, i1* %nrvo, !dbg !94 store i1 true, i1* %nrvo, !dbg !94
store i32 1, i32* %cleanup.dest.slot store i32 1, i32* %cleanup.dest.slot
@ -349,7 +349,7 @@ attributes #7 = { builtin nounwind }
!90 = !{!"0xf\00\000\0064\0064\000\000", null, null, !"_ZTS1B"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from _ZTS1B] !90 = !{!"0xf\00\000\0064\0064\000\000", null, null, !"_ZTS1B"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from _ZTS1B]
!91 = !MDLocation(line: 0, scope: !53) !91 = !MDLocation(line: 0, scope: !53)
!92 = !MDLocation(line: 49, scope: !53) !92 = !MDLocation(line: 49, scope: !53)
!93 = !{!"0x100\00a\0049\008192", !53, !7, !4} ; [ DW_TAG_auto_variable ] [a] [line 49] !93 = !{!"0x100\00a\0049\000", !53, !7, !4} ; [ DW_TAG_auto_variable ] [a] [line 49]
!94 = !MDLocation(line: 50, scope: !53) !94 = !MDLocation(line: 50, scope: !53)
!95 = !MDLocation(line: 51, scope: !53) !95 = !MDLocation(line: 51, scope: !53)
!96 = !MDLocation(line: 51, scope: !97) !96 = !MDLocation(line: 51, scope: !97)

4
llvm/test/DebugInfo/X86/vla.ll
View File

@ -33,7 +33,7 @@ entry:
%2 = call i8* @llvm.stacksave(), !dbg !17 %2 = call i8* @llvm.stacksave(), !dbg !17
store i8* %2, i8** %saved_stack, !dbg !17 store i8* %2, i8** %saved_stack, !dbg !17
%vla = alloca i32, i64 %1, align 16, !dbg !17 %vla = alloca i32, i64 %1, align 16, !dbg !17
call void @llvm.dbg.declare(metadata i32* %vla, metadata !18, metadata !{!"0x102"}), !dbg !17 call void @llvm.dbg.declare(metadata i32* %vla, metadata !18, metadata !{!"0x102\006"}), !dbg !17
%arrayidx = getelementptr inbounds i32* %vla, i64 0, !dbg !22 %arrayidx = getelementptr inbounds i32* %vla, i64 0, !dbg !22
store i32 42, i32* %arrayidx, align 4, !dbg !22 store i32 42, i32* %arrayidx, align 4, !dbg !22
%3 = load i32* %n.addr, align 4, !dbg !23 %3 = load i32* %n.addr, align 4, !dbg !23
@ -93,7 +93,7 @@ entry:
!15 = !{!"0x101\00n\0016777217\000", !4, !5, !8} ; [ DW_TAG_arg_variable ] [n] [line 1] !15 = !{!"0x101\00n\0016777217\000", !4, !5, !8} ; [ DW_TAG_arg_variable ] [n] [line 1]
!16 = !MDLocation(line: 1, scope: !4) !16 = !MDLocation(line: 1, scope: !4)
!17 = !MDLocation(line: 2, scope: !4) !17 = !MDLocation(line: 2, scope: !4)
!18 = !{!"0x100\00a\002\008192", !4, !5, !19} ; [ DW_TAG_auto_variable ] [a] [line 2] !18 = !{!"0x100\00a\002\000", !4, !5, !19} ; [ DW_TAG_auto_variable ] [a] [line 2]
!19 = !{!"0x1\00\000\000\0032\000\000", null, null, !8, !20, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int] !19 = !{!"0x1\00\000\000\0032\000\000", null, null, !8, !20, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int]
!20 = !{!21} !20 = !{!21}
!21 = !{!"0x21\000\00-1"} ; [ DW_TAG_subrange_type ] [unbounded] !21 = !{!"0x21\000\00-1"} ; [ DW_TAG_subrange_type ] [unbounded]

12
llvm/test/DebugInfo/debug-info-qualifiers.ll
View File

@ -68,14 +68,14 @@ attributes #1 = { nounwind readnone }
!4 = !{!"0x2\00A\002\008\008\000\000\000", !5, null, null, !6, null, null, !"_ZTS1A"} ; [ DW_TAG_class_type ] [A] [line 2, size 8, align 8, offset 0] [def] [from ] !4 = !{!"0x2\00A\002\008\008\000\000\000", !5, null, null, !6, null, null, !"_ZTS1A"} ; [ DW_TAG_class_type ] [A] [line 2, size 8, align 8, offset 0] [def] [from ]
!5 = !{!"debug-info-qualifiers.cpp", !""} !5 = !{!"debug-info-qualifiers.cpp", !""}
!6 = !{!7, !13} !6 = !{!7, !13}
!7 = !{!"0x2e\00l\00l\00_ZNKR1A1lEv\005\000\000\000\006\0016640\000\005", !5, !"_ZTS1A", !8, null, null, null, i32 0, !12} ; [ DW_TAG_subprogram ] [line 5] [reference] [l] !7 = !{!"0x2e\00l\00l\00_ZNKR1A1lEv\005\000\000\000\006\008448\000\005", !5, !"_ZTS1A", !8, null, null, null, i32 0, !12} ; [ DW_TAG_subprogram ] [line 5] [reference] [l]
!8 = !{!"0x15\00\000\000\000\000\0016384\000", i32 0, null, null, !9, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [reference] [from ] !8 = !{!"0x15\00\000\000\000\000\008192\000", i32 0, null, null, !9, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [reference] [from ]
!9 = !{null, !10} !9 = !{null, !10}
!10 = !{!"0xf\00\000\0064\0064\000\001088", null, null, !11} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from ] !10 = !{!"0xf\00\000\0064\0064\000\001088", null, null, !11} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from ]
!11 = !{!"0x26\00\000\000\000\000\000", null, null, !"_ZTS1A"} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from _ZTS1A] !11 = !{!"0x26\00\000\000\000\000\000", null, null, !"_ZTS1A"} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from _ZTS1A]
!12 = !{i32 786468} !12 = !{i32 786468}
!13 = !{!"0x2e\00r\00r\00_ZNKO1A1rEv\007\000\000\000\006\0033024\000\007", !5, !"_ZTS1A", !14, null, null, null, i32 0, !15} ; [ DW_TAG_subprogram ] [line 7] [rvalue reference] [r] !13 = !{!"0x2e\00r\00r\00_ZNKO1A1rEv\007\000\000\000\006\0017408\000\007", !5, !"_ZTS1A", !14, null, null, null, i32 0, !15} ; [ DW_TAG_subprogram ] [line 7] [rvalue reference] [r]
!14 = !{!"0x15\00\000\000\000\000\0032768\000", i32 0, null, null, !9, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [rvalue reference] [from ] !14 = !{!"0x15\00\000\000\000\000\0016384\000", i32 0, null, null, !9, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [rvalue reference] [from ]
!15 = !{i32 786468} !15 = !{i32 786468}
!16 = !{!17} !16 = !{!17}
!17 = !{!"0x2e\00g\00g\00_Z1gv\0010\000\001\000\006\00256\000\0010", !5, !18, !19, null, void ()* @_Z1gv, null, null, !2} ; [ DW_TAG_subprogram ] [line 10] [def] [g] !17 = !{!"0x2e\00g\00g\00_Z1gv\0010\000\001\000\006\00256\000\0010", !5, !18, !19, null, void ()* @_Z1gv, null, null, !2} ; [ DW_TAG_subprogram ] [line 10] [def] [g]
@ -89,12 +89,12 @@ attributes #1 = { nounwind readnone }
!25 = !MDLocation(line: 11, scope: !17) !25 = !MDLocation(line: 11, scope: !17)
!26 = !{!"0x100\00pl\0016\000", !17, !18, !27} ; [ DW_TAG_auto_variable ] [pl] [line 16] !26 = !{!"0x100\00pl\0016\000", !17, !18, !27} ; [ DW_TAG_auto_variable ] [pl] [line 16]
!27 = !{!"0x1f\00\000\000\000\000\000", null, null, !28, !"_ZTS1A"} ; [ DW_TAG_ptr_to_member_type ] [line 0, size 0, align 0, offset 0] [from ] !27 = !{!"0x1f\00\000\000\000\000\000", null, null, !28, !"_ZTS1A"} ; [ DW_TAG_ptr_to_member_type ] [line 0, size 0, align 0, offset 0] [from ]
!28 = !{!"0x15\00\000\000\000\000\0016384\000", i32 0, null, null, !29, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [reference] [from ] !28 = !{!"0x15\00\000\000\000\000\008192\000", i32 0, null, null, !29, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [reference] [from ]
!29 = !{null, !30} !29 = !{null, !30}
!30 = !{!"0xf\00\000\0064\0064\000\001088", null, null, !"_ZTS1A"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from _ZTS1A] !30 = !{!"0xf\00\000\0064\0064\000\001088", null, null, !"_ZTS1A"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from _ZTS1A]
!31 = !MDLocation(line: 16, scope: !17) !31 = !MDLocation(line: 16, scope: !17)
!32 = !{!"0x100\00pr\0021\000", !17, !18, !33} ; [ DW_TAG_auto_variable ] [pr] [line 21] !32 = !{!"0x100\00pr\0021\000", !17, !18, !33} ; [ DW_TAG_auto_variable ] [pr] [line 21]
!33 = !{!"0x1f\00\000\000\000\000\000", null, null, !34, !"_ZTS1A"} ; [ DW_TAG_ptr_to_member_type ] [line 0, size 0, align 0, offset 0] [from ] !33 = !{!"0x1f\00\000\000\000\000\000", null, null, !34, !"_ZTS1A"} ; [ DW_TAG_ptr_to_member_type ] [line 0, size 0, align 0, offset 0] [from ]
!34 = !{!"0x15\00\000\000\000\000\0032768\000", i32 0, null, null, !29, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [rvalue reference] [from ] !34 = !{!"0x15\00\000\000\000\000\0016384\000", i32 0, null, null, !29, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [rvalue reference] [from ]
!35 = !MDLocation(line: 21, scope: !17) !35 = !MDLocation(line: 21, scope: !17)
!36 = !MDLocation(line: 22, scope: !17) !36 = !MDLocation(line: 22, scope: !17)