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* Use simpler instruction templates to define instructions 

* Fix several extended opcodes

llvm-svn: 15423
This commit is contained in:
Misha Brukman 2004-08-02 21:58:52 +00:00
parent 6b21bde2d6
commit 570dcf63e6
1 changed files with 52 additions and 52 deletions
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104
llvm/lib/Target/PowerPC/PowerPCInstrInfo.td
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@ -23,17 +23,17 @@ let Defs = [LR] in
def MovePCtoLR : PPC32InstPatternPseudo<"MovePCtoLR", Pseudo>;
def IMPLICIT_DEF : PPC32InstPatternPseudo<"IMPLICIT_DEF", Pseudo>;
def LOADLoIndirect : PPC32InstPattern0 <"lwz", Gpr, Gpr0, Simm16, 14, 0, 0>;
def LOADLoDirect : PPC32InstPattern0 <"la", Gpr, Gpr0, Simm16, 14, 0, 0>;
def LOADHiAddr : PPC32InstPattern0 <"addis", Gpr, Gpr0, Simm16, 15, 0, 0>;
def LOADLoIndirect : DForm_2_r0 <"lwz", 14, 0, 0>;
def LOADLoDirect : DForm_2_r0<"la", 14, 0, 0>;
def LOADHiAddr : DForm_2_r0<"addis", 15, 0, 0>;
def ADDI : PPC32InstPattern0 <"addi", Gpr, Gpr0, Simm16, 14, 0, 0>;
def SUBI : PPC32InstPattern0 <"subi", Gpr, Gpr0, Simm16, 14, 0, 0>;
def ADDI : DForm_2_r0<"addi", 14, 0, 0>;
def SUBI : DForm_2_r0 <"subi", 14, 0, 0>;
def LI : PPC32InstPattern1 <"li", Gpr, Simm16, 14, 0, 0, 0>;
def ADDIS : PPC32InstPattern0 <"addis", Gpr, Gpr0, Simm16, 15, 0, 0>;
def ADDIS : DForm_2_r0 <"addis", 15, 0, 0>;
def LIS : PPC32InstPattern1 <"lis", Gpr, Simm16, 15, 0, 0, 0>;
def ADDIC : PPC32InstPattern0 <"addic", Gpr, Gpr, Simm16, 12, 0, 0>;
def ADDICo : PPC32InstPattern0 <"addic.", Gpr, Gpr, Simm16, 13, 0, 0>;
def ADDIC : DForm_2<"addic", 12, 0, 0>;
def ADDICo : DForm_2<"addic.", 13, 0, 0>;
def ADD : PPC32InstPattern2 <"add", Gpr, Gpr, Gpr, 31, 532, 0, 0>;
def ADDo : PPC32InstPattern2 <"add.", Gpr, Gpr, Gpr, 31, 533, 0, 0>;
def ADDO : PPC32InstPattern2 <"addo", Gpr, Gpr, Gpr, 31, 532, 0, 0>;
@ -54,12 +54,12 @@ def ADDZE : PPC32InstPattern3 <"addze", Gpr, Gpr, 31, 404, 0, 0>;
def ADDZEo : PPC32InstPattern3 <"addze.", Gpr, Gpr, 31, 405, 0, 0>;
def ADDZEO : PPC32InstPattern3 <"addzeo", Gpr, Gpr, 31, 1428, 0, 0>;
def ADDZEOo : PPC32InstPattern3 <"addzeo.", Gpr, Gpr, 31, 1429, 0, 0>;
def ANDIo : PPC32InstPattern4 <"andi.", Gpr, Gpr, Zimm16, 28, 0, 0>;
def ANDISo : PPC32InstPattern4 <"andis.", Gpr, Gpr, Zimm16, 29, 0, 0>;
def AND : PPC32InstPattern5 <"and", Gpr, Gpr, Gpr, 31, 56, 0, 0>;
def ANDo : PPC32InstPattern5 <"and.", Gpr, Gpr, Gpr, 31, 57, 0, 0>;
def ANDC : PPC32InstPattern5 <"andc", Gpr, Gpr, Gpr, 31, 120, 0, 0>;
def ANDCo : PPC32InstPattern5 <"andc.", Gpr, Gpr, Gpr, 31, 121, 0, 0>;
def ANDIo : DForm_4<"andi.", 28, 0, 0>;
def ANDISo : DForm_4<"andis.", 29, 0, 0>;
def AND : XForm_6<"and", 31, 28, 0, 0, 0>;
def ANDo : XForm_6<"and.", 31, 28, 1, 0, 0>;
def ANDC : XForm_6<"andc", 31, 60, 0, 0, 0>;
def ANDCo : XForm_6<"andc.", 31, 60, 1, 0, 0>;
let isBranch = 1, isTerminator = 1 in {
def COND_BRANCH : PPC32InstPatternPseudo<"COND_BRANCH", Pseudo>;
@ -281,8 +281,8 @@ def DIVWU : PPC32InstPattern2 <"divwu", Gpr, Gpr, Gpr, 31, 918, 0, 0>;
def DIVWUo : PPC32InstPattern2 <"divwu.", Gpr, Gpr, Gpr, 31, 919, 0, 0>;
def DIVWUO : PPC32InstPattern2 <"divwuo", Gpr, Gpr, Gpr, 31, 918, 0, 0>;
def DIVWUOo : PPC32InstPattern2 <"divwuo.", Gpr, Gpr, Gpr, 31, 919, 0, 0>;
def EQV : PPC32InstPattern5 <"eqv", Gpr, Gpr, Gpr, 31, 568, 0, 0>;
def EQVo : PPC32InstPattern5 <"eqv.", Gpr, Gpr, Gpr, 31, 569, 0, 0>;
def EQV : XForm_6<"eqv", 31, 284, 0, 0, 0>;
def EQVo : XForm_6<"eqv.", 31, 284, 1, 0, 0>;
def EXTSB : PPC32InstPattern17 <"extsb", Gpr, Gpr, 31, 1908, 0, 0>;
def EXTSBo : PPC32InstPattern17 <"extsb.", Gpr, Gpr, 31, 1909, 0, 0>;
def EXTSH : PPC32InstPattern17 <"extsh", Gpr, Gpr, 31, 1844, 0, 0>;
@ -438,21 +438,21 @@ def MULLD : PPC32InstPattern2 <"mulld", Gpr, Gpr, Gpr, 31, 466, 1, 0>;
def MULLDo : PPC32InstPattern2 <"mulld.", Gpr, Gpr, Gpr, 31, 467, 1, 0>;
def MULLDO : PPC32InstPattern2 <"mulldo", Gpr, Gpr, Gpr, 31, 466, 1, 0>;
def MULLDOo : PPC32InstPattern2 <"mulldo.", Gpr, Gpr, Gpr, 31, 467, 1, 0>;
def NAND : PPC32InstPattern5 <"nand", Gpr, Gpr, Gpr, 31, 952, 0, 0>;
def NANDo : PPC32InstPattern5 <"nand.", Gpr, Gpr, Gpr, 31, 953, 0, 0>;
def NAND : XForm_6<"nand", 31, 476, 0, 0, 0>;
def NANDo : XForm_6<"nand.", 31, 476, 1, 0, 0>;
def NEG : PPC32InstPattern3 <"neg", Gpr, Gpr, 31, 208, 0, 0>;
def NEGo : PPC32InstPattern3 <"neg.", Gpr, Gpr, 31, 209, 0, 0>;
def NEGO : PPC32InstPattern3 <"nego", Gpr, Gpr, 31, 1232, 0, 0>;
def NEGOo : PPC32InstPattern3 <"nego.", Gpr, Gpr, 31, 1233, 0, 0>;
def NOR : PPC32InstPattern5 <"nor", Gpr, Gpr, Gpr, 31, 248, 0, 0>;
def NORo : PPC32InstPattern5 <"nor.", Gpr, Gpr, Gpr, 31, 249, 0, 0>;
def NOR : XForm_6<"nor", 31, 124, 0, 0, 0>;
def NORo : XForm_6<"nor.", 31, 124, 1, 0, 0>;
def NOP : PPC32InstPattern33 <"nop", 1610612736, 0, 0>;
def ORI : PPC32InstPattern4 <"ori", Gpr, Gpr, Zimm16, 24, 0, 0>;
def ORIS : PPC32InstPattern4 <"oris", Gpr, Gpr, Zimm16, 25, 0, 0>;
def OR : PPC32InstPattern5 <"or", Gpr, Gpr, Gpr, 31, 888, 0, 0>;
def ORo : PPC32InstPattern5 <"or.", Gpr, Gpr, Gpr, 31, 889, 0, 0>;
def ORC : PPC32InstPattern5 <"orc", Gpr, Gpr, Gpr, 31, 824, 0, 0>;
def ORCo : PPC32InstPattern5 <"orc.", Gpr, Gpr, Gpr, 31, 825, 0, 0>;
def ORI : DForm_4<"ori", 24, 0, 0>;
def ORIS : DForm_4<"oris", 25, 0, 0>;
def OR : XForm_6<"or", 31, 444, 0, 0, 0>;
def ORo : XForm_6<"or.", 31, 444, 1, 0, 0>;
def ORC : XForm_6<"orc", 31, 412, 0, 0, 0>;
def ORCo : XForm_6<"orc.", 31, 412, 1, 0, 0>;
def RLDICL : PPC32InstPattern17 <"rldicl", Gpr, Gpr, 30, 0, 1, 0>;
def RLDICLo : PPC32InstPattern17 <"rldicl.", Gpr, Gpr, 30, 1, 1, 0>;
def RLDICR : PPC32InstPattern17 <"rldicr", Gpr, Gpr, 30, 4, 1, 0>;
@ -461,10 +461,10 @@ def RLDIC : PPC32InstPattern17 <"rldic", Gpr, Gpr, 30, 8, 1, 0>;
def RLDICo : PPC32InstPattern17 <"rldic.", Gpr, Gpr, 30, 9, 1, 0>;
def RLDIMI : PPC32InstPattern17 <"rldimi", Gpr, Gpr, 30, 12, 1, 0>;
def RLDIMIo : PPC32InstPattern17 <"rldimi.", Gpr, Gpr, 30, 13, 1, 0>;
def RLDCL : PPC32InstPattern5 <"rldcl", Gpr, Gpr, Gpr, 30, 16, 1, 0>;
def RLDCLo : PPC32InstPattern5 <"rldcl.", Gpr, Gpr, Gpr, 30, 17, 1, 0>;
def RLDCR : PPC32InstPattern5 <"rldcr", Gpr, Gpr, Gpr, 30, 18, 1, 0>;
def RLDCRo : PPC32InstPattern5 <"rldcr.", Gpr, Gpr, Gpr, 30, 19, 1, 0>;
def RLDCL : XForm_6<"rldcl", 30, 8, 0, 1, 0>;
def RLDCLo : XForm_6<"rldcl.", 30, 8, 1, 1, 0>;
def RLDCR : XForm_6<"rldcr", 30, 9, 0, 1, 0>;
def RLDCRo : XForm_6<"rldcr.", 30, 9, 1, 1, 0>;
def RLWINM : PPC32InstPattern34 <"rlwinm", Gpr, Gpr, Imm5, Imm5, Imm5, 21, 0, 0, 0>;
def RLWINMo : PPC32InstPattern34 <"rlwinm.", Gpr, Gpr, Imm5, Imm5, Imm5, 21, 0, 0, 0>;
def RLWNM : PPC32InstPattern34 <"rlwnm", Gpr, Gpr, Gpr, Imm5, Imm5, 23, 0, 0, 0>;
@ -473,22 +473,22 @@ def RLWIMI : PPC32InstPattern34 <"rlwimi", Gpr, Gpr, Imm5, Imm5, Imm5, 20, 0, 0,
def RLWIMIo : PPC32InstPattern34 <"rlwimi.", Gpr, Gpr, Imm5, Imm5, Imm5, 20, 0, 0, 0>;
def SC : PPC32InstPattern33 <"sc", 1140850690, 0, 0>;
def RFID : PPC32InstPattern33 <"rfid", 1275068452, 1, 0>;
def SLW : PPC32InstPattern5 <"slw", Gpr, Gpr, Gpr, 31, 48, 0, 0>;
def SLWo : PPC32InstPattern5 <"slw.", Gpr, Gpr, Gpr, 31, 49, 0, 0>;
def SLD : PPC32InstPattern5 <"sld", Gpr, Gpr, Gpr, 31, 54, 1, 0>;
def SLDo : PPC32InstPattern5 <"sld.", Gpr, Gpr, Gpr, 31, 55, 1, 0>;
def SRW : PPC32InstPattern5 <"srw", Gpr, Gpr, Gpr, 31, 48, 0, 0>;
def SRWo : PPC32InstPattern5 <"srw.", Gpr, Gpr, Gpr, 31, 49, 0, 0>;
def SRD : PPC32InstPattern5 <"srd", Gpr, Gpr, Gpr, 31, 54, 1, 0>;
def SRDo : PPC32InstPattern5 <"srd.", Gpr, Gpr, Gpr, 31, 55, 1, 0>;
def SRAWI : PPC32InstPattern5 <"srawi", Gpr, Gpr, Imm5, 31, 624, 0, 0>;
def SRAWIo : PPC32InstPattern5 <"srawi.", Gpr, Gpr, Imm5, 31, 625, 0, 0>;
def SLW : XForm_6<"slw", 31, 24, 0, 0, 0>;
def SLWo : XForm_6<"slw.", 31, 24, 1, 0, 0>;
def SLD : XForm_6<"sld", 31, 27, 0, 1, 0>;
def SLDo : XForm_6<"sld.", 31, 27, 1, 1, 0>;
def SRW : XForm_6<"srw", 31, 24, 0, 0, 0>;
def SRWo : XForm_6<"srw.", 31, 24, 1, 0, 0>;
def SRD : XForm_6<"srd", 31, 539, 0, 1, 0>;
def SRDo : XForm_6<"srd.", 31, 539, 1, 1, 0>;
def SRAWI : XForm_10<"srawi", 31, 824, 0, 0, 0>;
def SRAWIo : XForm_10<"srawi.", 31, 824, 1, 0, 0>;
def SRADI : PPC32InstPattern17 <"sradi", Gpr, Gpr, 31, 1652, 1, 0>;
def SRADIo : PPC32InstPattern17 <"sradi.", Gpr, Gpr, 31, 1653, 1, 0>;
def SRAW : PPC32InstPattern5 <"sraw", Gpr, Gpr, Gpr, 31, 560, 0, 0>;
def SRAWo : PPC32InstPattern5 <"sraw.", Gpr, Gpr, Gpr, 31, 561, 0, 0>;
def SRAD : PPC32InstPattern5 <"srad", Gpr, Gpr, Gpr, 31, 564, 1, 0>;
def SRADo : PPC32InstPattern5 <"srad.", Gpr, Gpr, Gpr, 31, 565, 1, 0>;
def SRAW : XForm_6<"sraw", 31, 280, 0, 0, 0>;
def SRAWo : XForm_6<"sraw.", 31, 280, 1, 0, 0>;
def SRAD : XForm_6<"srad", 31, 282, 0, 1, 0>;
def SRADo : XForm_6<"srad.", 31, 282, 1, 1, 0>;
def STB : PPC32InstPattern25 <"stb", Gpr, Disimm16, Gpr0, 38, 0, 0>;
def STBU : PPC32InstPattern25 <"stbu", Gpr, Disimm16, Gpr, 39, 0, 0>;
def STBX : PPC32InstPattern2 <"stbx", Gpr, Gpr0, Gpr, 31, 430, 0, 0>;
@ -520,7 +520,7 @@ def STFD : PPC32InstPattern25 <"stfd", Fpr, Disimm16, Gpr0, 54, 0, 0>;
def STFDU : PPC32InstPattern25 <"stfdu", Fpr, Disimm16, Gpr, 55, 0, 0>;
def STFDX : PPC32InstPattern2 <"stfdx", Fpr, Gpr0, Gpr, 31, 430, 0, 0>;
def STFDUX : PPC32InstPattern2 <"stfdux", Fpr, Gpr, Gpr, 31, 494, 0, 0>;
def SUBFIC : PPC32InstPattern0 <"subfic", Gpr, Gpr, Simm16, 8, 0, 0>;
def SUBFIC : DForm_2<"subfic", 8, 0, 0>;
def SUB : PPC32InstPattern35 <"sub", Gpr, Gpr, Gpr, 31, 80, 0, 0>;
def SUBo : PPC32InstPattern35 <"sub.", Gpr, Gpr, Gpr, 31, 81, 0, 0>;
def SUBO : PPC32InstPattern35 <"subo", Gpr, Gpr, Gpr, 31, 80, 0, 0>;
@ -552,7 +552,7 @@ def SUBFZEOo : PPC32InstPattern3 <"subfzeo.", Gpr, Gpr, 31, 1425, 0, 0>;
def SYNC : PPC32InstPattern36 <"sync", Imm2, 248, 1196, 0, 0>;
def LWSYNC : PPC32InstPattern33 <"lwsync", 2082473132, 0, 0>;
def PTESYNC : PPC32InstPattern33 <"ptesync", 2084570284, 0, 0>;
def TDI : PPC32InstPattern0 <"tdi", Imm5, Gpr, Simm16, 2, 1, 0>;
def TDI : DForm_7<"tdi", 2, 1, 0>;
def TDLTI : PPC32InstPattern37 <"tdlti", Gpr, Simm16, 80, 1, 0>;
def TDLEI : PPC32InstPattern37 <"tdlei", Gpr, Simm16, 84, 1, 0>;
def TDEQI : PPC32InstPattern37 <"tdeqi", Gpr, Simm16, 68, 1, 0>;
@ -582,7 +582,7 @@ def TDLGE : PPC32InstPattern38 <"tdlge", Gpr, Gpr, 997, 136, 1, 0>;
def TDLGT : PPC32InstPattern38 <"tdlgt", Gpr, Gpr, 993, 136, 1, 0>;
def TDLNL : PPC32InstPattern38 <"tdlnl", Gpr, Gpr, 997, 136, 1, 0>;
def TDLNG : PPC32InstPattern38 <"tdlng", Gpr, Gpr, 998, 136, 1, 0>;
def TWI : PPC32InstPattern0 <"twi", Imm5, Gpr, Simm16, 3, 0, 0>;
def TWI : DForm_7<"twi", 3, 0, 0>;
def TWLTI : PPC32InstPattern37 <"twlti", Gpr, Simm16, 112, 0, 0>;
def TWLEI : PPC32InstPattern37 <"twlei", Gpr, Simm16, 116, 0, 0>;
def TWEQI : PPC32InstPattern37 <"tweqi", Gpr, Simm16, 100, 0, 0>;
@ -613,10 +613,10 @@ def TWLGT : PPC32InstPattern38 <"twlgt", Gpr, Gpr, 993, 8, 0, 0>;
def TWLNL : PPC32InstPattern38 <"twlnl", Gpr, Gpr, 997, 8, 0, 0>;
def TWLNG : PPC32InstPattern38 <"twlng", Gpr, Gpr, 998, 8, 0, 0>;
def TRAP : PPC32InstPattern33 <"trap", 2145386504, 0, 0>;
def XORI : PPC32InstPattern4 <"xori", Gpr, Gpr, Zimm16, 26, 0, 0>;
def XORIS : PPC32InstPattern4 <"xoris", Gpr, Gpr, Zimm16, 27, 0, 0>;
def XOR : PPC32InstPattern5 <"xor", Gpr, Gpr, Gpr, 31, 632, 0, 0>;
def XORo : PPC32InstPattern5 <"xor.", Gpr, Gpr, Gpr, 31, 633, 0, 0>;
def XORI : DForm_4<"xori", 26, 0, 0>;
def XORIS : DForm_4<"xoris", 27, 0, 0>;
def XOR : XForm_6<"xor", 31, 316, 0, 0, 0>;
def XORo : XForm_6<"xor.", 31, 316, 1, 0, 0>;
def ICBI : PPC32InstPattern38 <"icbi", Gpr0, Gpr, 992, 940, 0, 0>;
def ISYNC : PPC32InstPattern33 <"isync", 1275068716, 0, 0>;
def DCBT : PPC32InstPattern39 <"dcbt", Gpr0, Gpr, Imm4, 62, 556, 1, 0>;
@ -654,7 +654,7 @@ def MTTBU : PPC32InstPattern21 <"mttbu", Gpr, 31, 869286, 0, 0>;
def MFTB : PPC32InstPattern28 <"mftb", Gpr, Spr, 31, 742, 0, 0>;
def MFTBU : PPC32InstPattern21 <"mftbu", Gpr, 31, 869094, 0, 0>;
def ATTN : PPC32InstPattern45 <"attn", Imm15, 0, 512, 0, 0>;
def MULLI : PPC32InstPattern0 <"mulli", Gpr, Gpr, Simm16, 7, 0, 0>;
def MULLI : DForm_2 <"mulli", 7, 0, 0>;
def TLBLD : PPC32InstPattern43 <"tlbld", Gpr, 31744, 932, 0, 0>;
def TLBLI : PPC32InstPattern43 <"tlbli", Gpr, 31744, 996, 0, 0>;
def LVEBX : PPC32InstPattern2 <"lvebx", Vpr, Gpr0, Gpr, 31, 14, 0, 1>;