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Tidy up. 80 columns. 

llvm-svn: 154881
This commit is contained in:
Jim Grosbach 2012-04-17 00:01:04 +00:00
parent 365e309ccb
commit 56e6326033
1 changed files with 9 additions and 7 deletions
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16
llvm/utils/TableGen/AsmMatcherEmitter.cpp
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@ -1181,7 +1181,8 @@ void AsmMatcherInfo::BuildInfo() {
unsigned VariantCount = Target.getAsmParserVariantCount(); unsigned VariantCount = Target.getAsmParserVariantCount();
for (unsigned VC = 0; VC != VariantCount; ++VC) { for (unsigned VC = 0; VC != VariantCount; ++VC) {
Record *AsmVariant = Target.getAsmParserVariant(VC); Record *AsmVariant = Target.getAsmParserVariant(VC);
std::string CommentDelimiter = AsmVariant->getValueAsString("CommentDelimiter"); std::string CommentDelimiter =
AsmVariant->getValueAsString("CommentDelimiter");
std::string RegisterPrefix = AsmVariant->getValueAsString("RegisterPrefix"); std::string RegisterPrefix = AsmVariant->getValueAsString("RegisterPrefix");
int AsmVariantNo = AsmVariant->getValueAsInt("Variant"); int AsmVariantNo = AsmVariant->getValueAsInt("Variant");
@ -1208,11 +1209,11 @@ void AsmMatcherInfo::BuildInfo() {
// reject it. We reject aliases and ignore instructions for now. // reject it. We reject aliases and ignore instructions for now.
if (OI.MINumOperands != 1) { if (OI.MINumOperands != 1) {
// FIXME: Should reject these. The ARM backend hits this with $lane // FIXME: Should reject these. The ARM backend hits this with $lane
// in a bunch of instructions. It is unclear what the right answer is. // in a bunch of instructions. The right answer is unclear.
DEBUG({ DEBUG({
errs() << "warning: '" << CGI.TheDef->getName() << "': " errs() << "warning: '" << CGI.TheDef->getName() << "': "
<< "ignoring instruction with multi-operand tied operand '" << "ignoring instruction with multi-operand tied operand '"
<< OI.Name << "'\n"; << OI.Name << "'\n";
}); });
continue; continue;
} }
@ -1248,8 +1249,8 @@ void AsmMatcherInfo::BuildInfo() {
// If the tblgen -match-prefix option is specified (for tblgen hackers), // If the tblgen -match-prefix option is specified (for tblgen hackers),
// filter the set of instruction aliases we consider, based on the target // filter the set of instruction aliases we consider, based on the target
// instruction. // instruction.
if (!StringRef(Alias->ResultInst->TheDef->getName()).startswith( if (!StringRef(Alias->ResultInst->TheDef->getName())
MatchPrefix)) .startswith( MatchPrefix))
continue; continue;
OwningPtr<MatchableInfo> II(new MatchableInfo(Alias)); OwningPtr<MatchableInfo> II(new MatchableInfo(Alias));
@ -1868,7 +1869,8 @@ static void EmitComputeAvailableFeatures(AsmMatcherInfo &Info,
SubtargetFeatureInfo &SFI = *it->second; SubtargetFeatureInfo &SFI = *it->second;
OS << " if ("; OS << " if (";
std::string CondStorage = SFI.TheDef->getValueAsString("AssemblerCondString"); std::string CondStorage =
SFI.TheDef->getValueAsString("AssemblerCondString");
StringRef Conds = CondStorage; StringRef Conds = CondStorage;
std::pair<StringRef,StringRef> Comma = Conds.split(','); std::pair<StringRef,StringRef> Comma = Conds.split(',');
bool First = true; bool First = true;