parent
8cd28f0fb1
commit
5662b21db1
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@ -689,7 +689,7 @@ unsigned findScratchRegister(RegScavenger *RS, const TargetRegisterClass *RC,
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}
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}
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void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS) const{
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int SPAdj, RegScavenger *RS) const{
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unsigned i = 0;
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unsigned i = 0;
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MachineInstr &MI = *II;
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MachineInstr &MI = *II;
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MachineBasicBlock &MBB = *MI.getParent();
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MachineBasicBlock &MBB = *MI.getParent();
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@ -705,7 +705,7 @@ void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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unsigned FrameReg = ARM::SP;
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unsigned FrameReg = ARM::SP;
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int FrameIndex = MI.getOperand(i).getFrameIndex();
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int FrameIndex = MI.getOperand(i).getFrameIndex();
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int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
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int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
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MF.getFrameInfo()->getStackSize();
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MF.getFrameInfo()->getStackSize() + SPAdj;
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if (AFI->isGPRCalleeSavedArea1Frame(FrameIndex))
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if (AFI->isGPRCalleeSavedArea1Frame(FrameIndex))
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Offset -= AFI->getGPRCalleeSavedArea1Offset();
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Offset -= AFI->getGPRCalleeSavedArea1Offset();
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@ -714,6 +714,7 @@ void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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else if (AFI->isDPRCalleeSavedAreaFrame(FrameIndex))
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else if (AFI->isDPRCalleeSavedAreaFrame(FrameIndex))
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Offset -= AFI->getDPRCalleeSavedAreaOffset();
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Offset -= AFI->getDPRCalleeSavedAreaOffset();
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else if (hasFP(MF)) {
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else if (hasFP(MF)) {
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assert(SPAdj == 0 && "Unexpected");
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// There is alloca()'s in this function, must reference off the frame
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// There is alloca()'s in this function, must reference off the frame
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// pointer instead.
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// pointer instead.
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FrameReg = getFrameRegister(MF);
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FrameReg = getFrameRegister(MF);
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@ -988,7 +989,7 @@ void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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unsigned ScratchReg = findScratchRegister(RS, &ARM::GPRRegClass, AFI);
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unsigned ScratchReg = findScratchRegister(RS, &ARM::GPRRegClass, AFI);
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if (ScratchReg == 0)
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if (ScratchReg == 0)
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// No register is "free". Scavenge a register.
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// No register is "free". Scavenge a register.
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ScratchReg = RS->scavengeRegister(&ARM::GPRRegClass, II);
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ScratchReg = RS->scavengeRegister(&ARM::GPRRegClass, II, SPAdj);
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emitARMRegPlusImmediate(MBB, II, ScratchReg, FrameReg,
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emitARMRegPlusImmediate(MBB, II, ScratchReg, FrameReg,
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isSub ? -Offset : Offset, TII);
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isSub ? -Offset : Offset, TII);
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MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true);
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MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true);
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@ -85,7 +85,7 @@ public:
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MachineBasicBlock::iterator I) const;
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MachineBasicBlock::iterator I) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS = NULL) const;
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int SPAdj, RegScavenger *RS = NULL) const;
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void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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RegScavenger *RS = NULL) const;
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RegScavenger *RS = NULL) const;
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@ -255,7 +255,9 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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//<- SP
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//<- SP
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void AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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void AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS) const {
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int SPAdj, RegScavenger *RS) const {
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assert(SPAdj == 0 && "Unexpected");
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unsigned i = 0;
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unsigned i = 0;
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MachineInstr &MI = *II;
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MachineInstr &MI = *II;
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MachineBasicBlock &MBB = *MI.getParent();
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MachineBasicBlock &MBB = *MI.getParent();
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@ -61,7 +61,7 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
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MachineBasicBlock::iterator I) const;
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MachineBasicBlock::iterator I) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS = NULL) const;
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int SPAdj, RegScavenger *RS = NULL) const;
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//void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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//void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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@ -177,7 +177,9 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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}
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}
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void IA64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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void IA64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS)const{
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int SPAdj, RegScavenger *RS)const{
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assert(SPAdj == 0 && "Unexpected");
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unsigned i = 0;
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unsigned i = 0;
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MachineInstr &MI = *II;
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MachineInstr &MI = *II;
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MachineBasicBlock &MBB = *MI.getParent();
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MachineBasicBlock &MBB = *MI.getParent();
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@ -60,7 +60,7 @@ struct IA64RegisterInfo : public IA64GenRegisterInfo {
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MachineBasicBlock::iterator MI) const;
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MachineBasicBlock::iterator MI) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator MI,
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void eliminateFrameIndex(MachineBasicBlock::iterator MI,
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RegScavenger *RS = NULL) const;
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int SPAdj, RegScavenger *RS = NULL) const;
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void emitPrologue(MachineFunction &MF) const;
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void emitPrologue(MachineFunction &MF) const;
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void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
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void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
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@ -589,7 +589,9 @@ void PPCRegisterInfo::lowerDynamicAlloc(MachineBasicBlock::iterator II) const {
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}
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}
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void PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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void PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS) const {
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int SPAdj, RegScavenger *RS) const {
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assert(SPAdj == 0 && "Unexpected");
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// Get the instruction.
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// Get the instruction.
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MachineInstr &MI = *II;
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MachineInstr &MI = *II;
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// Get the instruction's basic block.
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// Get the instruction's basic block.
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@ -80,7 +80,7 @@ public:
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void lowerDynamicAlloc(MachineBasicBlock::iterator II) const;
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void lowerDynamicAlloc(MachineBasicBlock::iterator II) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS = NULL) const;
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int SPAdj, RegScavenger *RS = NULL) const;
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/// determineFrameLayout - Determine the size of the frame and maximum call
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/// determineFrameLayout - Determine the size of the frame and maximum call
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/// frame size.
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/// frame size.
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@ -165,7 +165,9 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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}
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}
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void SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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void SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS) const {
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int SPAdj, RegScavenger *RS) const {
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assert(SPAdj == 0 && "Unexpected");
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unsigned i = 0;
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unsigned i = 0;
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MachineInstr &MI = *II;
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MachineInstr &MI = *II;
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while (!MI.getOperand(i).isFrameIndex()) {
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while (!MI.getOperand(i).isFrameIndex()) {
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@ -64,7 +64,7 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo {
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MachineBasicBlock::iterator I) const;
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MachineBasicBlock::iterator I) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS = NULL) const;
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int SPAdj, RegScavenger *RS = NULL) const;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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@ -986,7 +986,9 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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}
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}
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void X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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void X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS) const{
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int SPAdj, RegScavenger *RS) const{
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assert(SPAdj == 0 && "Unexpected");
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unsigned i = 0;
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unsigned i = 0;
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MachineInstr &MI = *II;
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MachineInstr &MI = *II;
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MachineFunction &MF = *MI.getParent()->getParent();
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MachineFunction &MF = *MI.getParent()->getParent();
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MachineBasicBlock::iterator MI) const;
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MachineBasicBlock::iterator MI) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator MI,
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void eliminateFrameIndex(MachineBasicBlock::iterator MI,
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RegScavenger *RS = NULL) const;
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int SPAdj, RegScavenger *RS = NULL) const;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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