[AVX512] Remove and autoupgrade many of the broadcast intrinsics
Summary: This autoupgrades most of the broadcast intrinsics. They've been unused in clang for some time. This leaves the 32x2 intrinsics because they are still used in clang. Reviewers: RKSimon, zvi, igorb Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D36606 llvm-svn: 310725
This commit is contained in:
Craig Topper
parent
0f30fe9634
commit
561092f233
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@ -4440,66 +4440,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[llvm_v16i32_ty],
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Intrinsic<[llvm_v16i32_ty],
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[llvm_v4i32_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrNoMem]>;
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[llvm_v4i32_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcastf32x4_256 :
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GCCBuiltin<"__builtin_ia32_broadcastf32x4_256_mask">,
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Intrinsic<[llvm_v8f32_ty],
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[llvm_v4f32_ty, llvm_v8f32_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcastf32x4_512 :
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GCCBuiltin<"__builtin_ia32_broadcastf32x4_512">,
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Intrinsic<[llvm_v16f32_ty],
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[llvm_v4f32_ty, llvm_v16f32_ty, llvm_i16_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcastf32x8_512 :
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GCCBuiltin<"__builtin_ia32_broadcastf32x8_512_mask">,
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Intrinsic<[llvm_v16f32_ty],
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[llvm_v8f32_ty, llvm_v16f32_ty, llvm_i16_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcastf64x2_256 :
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GCCBuiltin<"__builtin_ia32_broadcastf64x2_256_mask">,
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Intrinsic<[llvm_v4f64_ty],
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[llvm_v2f64_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcastf64x2_512 :
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GCCBuiltin<"__builtin_ia32_broadcastf64x2_512_mask">,
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Intrinsic<[llvm_v8f64_ty],
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[llvm_v2f64_ty, llvm_v8f64_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcastf64x4_512 :
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GCCBuiltin<"__builtin_ia32_broadcastf64x4_512">,
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Intrinsic<[llvm_v8f64_ty],
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[llvm_v4f64_ty, llvm_v8f64_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcasti32x4_256 :
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GCCBuiltin<"__builtin_ia32_broadcasti32x4_256_mask">,
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Intrinsic<[llvm_v8i32_ty],
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[llvm_v4i32_ty, llvm_v8i32_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcasti32x4_512 :
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GCCBuiltin<"__builtin_ia32_broadcasti32x4_512">,
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Intrinsic<[llvm_v16i32_ty],
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[llvm_v4i32_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcasti32x8_512 :
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GCCBuiltin<"__builtin_ia32_broadcasti32x8_512_mask">,
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Intrinsic<[llvm_v16i32_ty],
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[llvm_v8i32_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcasti64x2_256 :
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GCCBuiltin<"__builtin_ia32_broadcasti64x2_256_mask">,
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Intrinsic<[llvm_v4i64_ty],
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[llvm_v2i64_ty, llvm_v4i64_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcasti64x2_512 :
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GCCBuiltin<"__builtin_ia32_broadcasti64x2_512_mask">,
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Intrinsic<[llvm_v8i64_ty],
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[llvm_v2i64_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_broadcasti64x4_512 :
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GCCBuiltin<"__builtin_ia32_broadcasti64x4_512">,
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Intrinsic<[llvm_v8i64_ty],
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[llvm_v4i64_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_broadcastmw_512 :
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def int_x86_avx512_broadcastmw_512 :
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GCCBuiltin<"__builtin_ia32_broadcastmw512">,
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GCCBuiltin<"__builtin_ia32_broadcastmw512">,
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Intrinsic<[llvm_v16i32_ty], [llvm_i16_ty], [IntrNoMem]>;
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Intrinsic<[llvm_v16i32_ty], [llvm_i16_ty], [IntrNoMem]>;
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@ -239,6 +239,14 @@ static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) {
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Name.startswith("avx2.pblendd.") || // Added in 3.7
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Name.startswith("avx2.pblendd.") || // Added in 3.7
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Name.startswith("avx.vbroadcastf128") || // Added in 4.0
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Name.startswith("avx.vbroadcastf128") || // Added in 4.0
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Name == "avx2.vbroadcasti128" || // Added in 3.7
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Name == "avx2.vbroadcasti128" || // Added in 3.7
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Name.startswith("avx512.mask.broadcastf32x4.") || // Added in 6.0
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Name.startswith("avx512.mask.broadcastf64x2.") || // Added in 6.0
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Name.startswith("avx512.mask.broadcasti32x4.") || // Added in 6.0
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Name.startswith("avx512.mask.broadcasti64x2.") || // Added in 6.0
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Name == "avx512.mask.broadcastf32x8.512" || // Added in 6.0
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Name == "avx512.mask.broadcasti32x8.512" || // Added in 6.0
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Name == "avx512.mask.broadcastf64x4.512" || // Added in 6.0
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Name == "avx512.mask.broadcasti64x4.512" || // Added in 6.0
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Name == "xop.vpcmov" || // Added in 3.8
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Name == "xop.vpcmov" || // Added in 3.8
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Name == "xop.vpcmov.256" || // Added in 5.0
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Name == "xop.vpcmov.256" || // Added in 5.0
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Name.startswith("avx512.mask.move.s") || // Added in 4.0
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Name.startswith("avx512.mask.move.s") || // Added in 4.0
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@ -1221,6 +1229,21 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
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else
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else
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Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
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Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
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{ 0, 1, 2, 3, 0, 1, 2, 3 });
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{ 0, 1, 2, 3, 0, 1, 2, 3 });
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} else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") ||
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Name.startswith("avx512.mask.broadcasti"))) {
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unsigned NumSrcElts =
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CI->getArgOperand(0)->getType()->getVectorNumElements();
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unsigned NumDstElts = CI->getType()->getVectorNumElements();
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SmallVector<uint32_t, 8> ShuffleMask(NumDstElts);
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for (unsigned i = 0; i != NumDstElts; ++i)
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ShuffleMask[i] = i % NumSrcElts;
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Rep = Builder.CreateShuffleVector(CI->getArgOperand(0),
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CI->getArgOperand(0),
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ShuffleMask);
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Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
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CI->getArgOperand(1));
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} else if (IsX86 && (Name.startswith("avx2.pbroadcast") ||
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} else if (IsX86 && (Name.startswith("avx2.pbroadcast") ||
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Name.startswith("avx2.vbroadcast") ||
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Name.startswith("avx2.vbroadcast") ||
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Name.startswith("avx512.pbroadcast") ||
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Name.startswith("avx512.pbroadcast") ||
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@ -19908,23 +19908,6 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, const X86Subtarget &Subtarget
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DAG.getIntPtrConstant(0, dl));
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DAG.getIntPtrConstant(0, dl));
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return DAG.getBitcast(Op.getValueType(), Res);
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return DAG.getBitcast(Op.getValueType(), Res);
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}
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}
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case BRCST_SUBVEC_TO_VEC: {
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SDValue Src = Op.getOperand(1);
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SDValue Passthru = Op.getOperand(2);
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SDValue Mask = Op.getOperand(3);
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EVT resVT = Passthru.getValueType();
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SDValue subVec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, resVT,
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DAG.getUNDEF(resVT), Src,
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DAG.getIntPtrConstant(0, dl));
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SDValue immVal;
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if (Src.getSimpleValueType().is256BitVector() && resVT.is512BitVector())
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immVal = DAG.getConstant(0x44, dl, MVT::i8);
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else
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immVal = DAG.getConstant(0, dl, MVT::i8);
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return getVectorMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT,
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subVec, subVec, immVal),
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Mask, Passthru, Subtarget, DAG);
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}
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case BRCST32x2_TO_VEC: {
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case BRCST32x2_TO_VEC: {
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SDValue Src = Op.getOperand(1);
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SDValue Src = Op.getOperand(1);
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SDValue PassThru = Op.getOperand(2);
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SDValue PassThru = Op.getOperand(2);
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@ -32,7 +32,7 @@ enum IntrinsicType : uint16_t {
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FMA_OP_SCALAR_MASK, FMA_OP_SCALAR_MASKZ, FMA_OP_SCALAR_MASK3,
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FMA_OP_SCALAR_MASK, FMA_OP_SCALAR_MASKZ, FMA_OP_SCALAR_MASK3,
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VPERM_2OP_MASK, VPERM_3OP_MASK, VPERM_3OP_MASKZ, INTR_TYPE_SCALAR_MASK,
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VPERM_2OP_MASK, VPERM_3OP_MASK, VPERM_3OP_MASKZ, INTR_TYPE_SCALAR_MASK,
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INTR_TYPE_SCALAR_MASK_RM, INTR_TYPE_3OP_SCALAR_MASK_RM,
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INTR_TYPE_SCALAR_MASK_RM, INTR_TYPE_3OP_SCALAR_MASK_RM,
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COMPRESS_EXPAND_IN_REG, COMPRESS_TO_MEM, BRCST_SUBVEC_TO_VEC, BRCST32x2_TO_VEC,
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COMPRESS_EXPAND_IN_REG, COMPRESS_TO_MEM, BRCST32x2_TO_VEC,
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TRUNCATE_TO_MEM_VI8, TRUNCATE_TO_MEM_VI16, TRUNCATE_TO_MEM_VI32,
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TRUNCATE_TO_MEM_VI8, TRUNCATE_TO_MEM_VI16, TRUNCATE_TO_MEM_VI32,
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EXPAND_FROM_MEM,
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EXPAND_FROM_MEM,
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TERLOG_OP_MASK, TERLOG_OP_MASKZ, BROADCASTM, KUNPCK, FIXUPIMM, FIXUPIMM_MASKZ, FIXUPIMMS,
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TERLOG_OP_MASK, TERLOG_OP_MASKZ, BROADCASTM, KUNPCK, FIXUPIMM, FIXUPIMM_MASKZ, FIXUPIMMS,
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@ -482,36 +482,12 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86ISD::VBROADCAST, 0),
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X86ISD::VBROADCAST, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcastf32x2_512, BRCST32x2_TO_VEC,
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X86_INTRINSIC_DATA(avx512_mask_broadcastf32x2_512, BRCST32x2_TO_VEC,
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X86ISD::VBROADCAST, 0),
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X86ISD::VBROADCAST, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcastf32x4_256, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcastf32x4_512, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcastf32x8_512, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcastf64x2_256, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcastf64x2_512, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcastf64x4_512, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcasti32x2_128, BRCST32x2_TO_VEC,
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X86_INTRINSIC_DATA(avx512_mask_broadcasti32x2_128, BRCST32x2_TO_VEC,
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X86ISD::VBROADCAST, 0),
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X86ISD::VBROADCAST, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcasti32x2_256, BRCST32x2_TO_VEC,
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X86_INTRINSIC_DATA(avx512_mask_broadcasti32x2_256, BRCST32x2_TO_VEC,
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X86ISD::VBROADCAST, 0),
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X86ISD::VBROADCAST, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcasti32x2_512, BRCST32x2_TO_VEC,
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X86_INTRINSIC_DATA(avx512_mask_broadcasti32x2_512, BRCST32x2_TO_VEC,
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X86ISD::VBROADCAST, 0),
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X86ISD::VBROADCAST, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcasti32x4_256, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcasti32x4_512, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcasti32x8_512, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcasti64x2_256, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcasti64x2_512, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_broadcasti64x4_512, BRCST_SUBVEC_TO_VEC,
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X86ISD::SHUF128, 0),
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X86_INTRINSIC_DATA(avx512_mask_cmp_pd_128, CMP_MASK_CC, X86ISD::CMPM, 0),
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X86_INTRINSIC_DATA(avx512_mask_cmp_pd_128, CMP_MASK_CC, X86ISD::CMPM, 0),
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X86_INTRINSIC_DATA(avx512_mask_cmp_pd_256, CMP_MASK_CC, X86ISD::CMPM, 0),
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X86_INTRINSIC_DATA(avx512_mask_cmp_pd_256, CMP_MASK_CC, X86ISD::CMPM, 0),
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X86_INTRINSIC_DATA(avx512_mask_cmp_pd_512, CMP_MASK_CC, X86ISD::CMPM,
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X86_INTRINSIC_DATA(avx512_mask_cmp_pd_512, CMP_MASK_CC, X86ISD::CMPM,
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@ -3444,3 +3444,140 @@ define <8 x i8> @test_mask_ucmp_q_512(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
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}
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}
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declare i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64>, <8 x i64>, i32, i8) nounwind readnone
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declare i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64>, <8 x i64>, i32, i8) nounwind readnone
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declare <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float>, <16 x float>, i16)
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define <16 x float>@test_int_x86_avx512_mask_broadcastf32x4_512(<4 x float> %x0, <16 x float> %x2, i16 %mask) {
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; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x4_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovaps %zmm0, %zmm2 {%k1} {z}
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; CHECK-NEXT: vaddps %zmm1, %zmm0, %zmm0
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; CHECK-NEXT: vaddps %zmm0, %zmm2, %zmm0
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; CHECK-NEXT: retq
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%res1 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 -1)
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%res2 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 %mask)
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%res3 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> zeroinitializer, i16 %mask)
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%res4 = fadd <16 x float> %res1, %res2
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%res5 = fadd <16 x float> %res3, %res4
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ret <16 x float> %res5
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}
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define <16 x float>@test_int_x86_avx512_mask_broadcastf32x4_512_load(<4 x float>* %x0ptr, <16 x float> %x2, i16 %mask) {
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; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x4_512_load:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovw %esi, %k1
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; CHECK-NEXT: vbroadcastf32x4 {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
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; CHECK-NEXT: retq
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||||||
|
%x0 = load <4 x float>, <4 x float>* %x0ptr
|
||||||
|
%res = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 %mask)
|
||||||
|
ret <16 x float> %res
|
||||||
|
}
|
||||||
|
|
||||||
|
declare <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double>, <8 x double>, i8)
|
||||||
|
|
||||||
|
define <8 x double>@test_int_x86_avx512_mask_broadcastf64x4_512(<4 x double> %x0, <8 x double> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x4_512:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
||||||
|
; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm2
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1
|
||||||
|
; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm1 {%k1}
|
||||||
|
; CHECK-NEXT: vaddpd %zmm1, %zmm2, %zmm1
|
||||||
|
; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 {%k1} {z}
|
||||||
|
; CHECK-NEXT: vaddpd %zmm1, %zmm0, %zmm0
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%res1 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 -1)
|
||||||
|
%res2 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 %mask)
|
||||||
|
%res3 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> zeroinitializer, i8 %mask)
|
||||||
|
%res4 = fadd <8 x double> %res1, %res2
|
||||||
|
%res5 = fadd <8 x double> %res3, %res4
|
||||||
|
ret <8 x double> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <8 x double>@test_int_x86_avx512_mask_broadcastf64x4_512_load(<4 x double>* %x0ptr, <8 x double> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x4_512_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1
|
||||||
|
; CHECK-NEXT: vbroadcastf64x4 {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,0,1,2,3]
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%x0 = load <4 x double>, <4 x double>* %x0ptr
|
||||||
|
%res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 %mask)
|
||||||
|
ret <8 x double> %res
|
||||||
|
}
|
||||||
|
|
||||||
|
declare <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32>, <16 x i32>, i16)
|
||||||
|
|
||||||
|
define <16 x i32>@test_int_x86_avx512_mask_broadcasti32x4_512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x4_512:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
||||||
|
; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
|
||||||
|
; CHECK-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1
|
||||||
|
; CHECK-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}
|
||||||
|
; CHECK-NEXT: vmovdqa32 %zmm0, %zmm2 {%k1} {z}
|
||||||
|
; CHECK-NEXT: vpaddd %zmm1, %zmm0, %zmm0
|
||||||
|
; CHECK-NEXT: vpaddd %zmm0, %zmm2, %zmm0
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%res1 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 -1)
|
||||||
|
%res2 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask)
|
||||||
|
%res3 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> zeroinitializer, i16 %mask)
|
||||||
|
%res4 = add <16 x i32> %res1, %res2
|
||||||
|
%res5 = add <16 x i32> %res3, %res4
|
||||||
|
ret <16 x i32> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <16 x i32>@test_int_x86_avx512_mask_broadcasti32x4_512_load(<4 x i32>* %x0ptr, <16 x i32> %x2, i16 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x4_512_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1
|
||||||
|
; CHECK-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%x0 = load <4 x i32>, <4 x i32>* %x0ptr
|
||||||
|
%res = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask)
|
||||||
|
ret <16 x i32> %res
|
||||||
|
}
|
||||||
|
|
||||||
|
declare <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64>, <8 x i64>, i8)
|
||||||
|
|
||||||
|
define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x4_512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x4_512:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
||||||
|
; CHECK-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm2
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1
|
||||||
|
; CHECK-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm1 {%k1}
|
||||||
|
; CHECK-NEXT: vpaddq %zmm1, %zmm2, %zmm1
|
||||||
|
; CHECK-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0 {%k1} {z}
|
||||||
|
; CHECK-NEXT: vpaddq %zmm1, %zmm0, %zmm0
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%res1 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 -1)
|
||||||
|
%res2 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask)
|
||||||
|
%res3 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> zeroinitializer, i8 %mask)
|
||||||
|
%res4 = add <8 x i64> %res1, %res2
|
||||||
|
%res5 = add <8 x i64> %res3, %res4
|
||||||
|
ret <8 x i64> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x4_512_load(<4 x i64>* %x0ptr, <8 x i64> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x4_512_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1
|
||||||
|
; CHECK-NEXT: vbroadcasti64x4 {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,0,1,2,3]
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%x0 = load <4 x i64>, <4 x i64>* %x0ptr
|
||||||
|
%res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask)
|
||||||
|
ret <8 x i64> %res
|
||||||
|
}
|
||||||
|
|
|
||||||
|
|
@ -3822,145 +3822,6 @@ define i32 @test_x86_avx512_ucomi_ss_lt(<4 x float> %a0, <4 x float> %a1) {
|
||||||
|
|
||||||
declare i32 @llvm.x86.avx512.vcomi.ss(<4 x float>, <4 x float>, i32, i32)
|
declare i32 @llvm.x86.avx512.vcomi.ss(<4 x float>, <4 x float>, i32, i32)
|
||||||
|
|
||||||
declare <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float>, <16 x float>, i16)
|
|
||||||
|
|
||||||
define <16 x float>@test_int_x86_avx512_mask_broadcastf32x4_512(<4 x float> %x0, <16 x float> %x2, i16 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x4_512:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1
|
|
||||||
; CHECK-NEXT: vshuff32x4 {{.*#+}} zmm2 {%k1} {z} = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshuff32x4 {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshuff32x4 {{.*#+}} zmm0 = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vaddps %zmm1, %zmm0, %zmm0
|
|
||||||
; CHECK-NEXT: vaddps %zmm0, %zmm2, %zmm0
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%res1 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 -1)
|
|
||||||
%res2 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 %mask)
|
|
||||||
%res3 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> zeroinitializer, i16 %mask)
|
|
||||||
%res4 = fadd <16 x float> %res1, %res2
|
|
||||||
%res5 = fadd <16 x float> %res3, %res4
|
|
||||||
ret <16 x float> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <16 x float>@test_int_x86_avx512_mask_broadcastf32x4_512_load(<4 x float>* %x0ptr, <16 x float> %x2, i16 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x4_512_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1
|
|
||||||
; CHECK-NEXT: vmovaps (%rdi), %xmm1
|
|
||||||
; CHECK-NEXT: vshuff32x4 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
%x0 = load <4 x float>, <4 x float>* %x0ptr
|
|
||||||
%res = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 %mask)
|
|
||||||
ret <16 x float> %res
|
|
||||||
}
|
|
||||||
|
|
||||||
declare <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double>, <8 x double>, i8)
|
|
||||||
|
|
||||||
define <8 x double>@test_int_x86_avx512_mask_broadcastf64x4_512(<4 x double> %x0, <8 x double> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x4_512:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1
|
|
||||||
; CHECK-NEXT: vshuff64x2 {{.*#+}} zmm2 {%k1} {z} = zmm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshuff64x2 {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshuff64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vaddpd %zmm1, %zmm0, %zmm0
|
|
||||||
; CHECK-NEXT: vaddpd %zmm0, %zmm2, %zmm0
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%res1 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 -1)
|
|
||||||
%res2 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 %mask)
|
|
||||||
%res3 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> zeroinitializer, i8 %mask)
|
|
||||||
%res4 = fadd <8 x double> %res1, %res2
|
|
||||||
%res5 = fadd <8 x double> %res3, %res4
|
|
||||||
ret <8 x double> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <8 x double>@test_int_x86_avx512_mask_broadcastf64x4_512_load(<4 x double>* %x0ptr, <8 x double> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x4_512_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1
|
|
||||||
; CHECK-NEXT: vmovapd (%rdi), %ymm1
|
|
||||||
; CHECK-NEXT: vshuff64x2 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%x0 = load <4 x double>, <4 x double>* %x0ptr
|
|
||||||
%res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 %mask)
|
|
||||||
ret <8 x double> %res
|
|
||||||
}
|
|
||||||
|
|
||||||
declare <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32>, <16 x i32>, i16)
|
|
||||||
|
|
||||||
define <16 x i32>@test_int_x86_avx512_mask_broadcasti32x4_512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x4_512:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1
|
|
||||||
; CHECK-NEXT: vshufi32x4 {{.*#+}} zmm2 {%k1} {z} = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshufi32x4 {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshufi32x4 {{.*#+}} zmm0 = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vpaddd %zmm1, %zmm0, %zmm0
|
|
||||||
; CHECK-NEXT: vpaddd %zmm0, %zmm2, %zmm0
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%res1 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 -1)
|
|
||||||
%res2 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask)
|
|
||||||
%res3 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> zeroinitializer, i16 %mask)
|
|
||||||
%res4 = add <16 x i32> %res1, %res2
|
|
||||||
%res5 = add <16 x i32> %res3, %res4
|
|
||||||
ret <16 x i32> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <16 x i32>@test_int_x86_avx512_mask_broadcasti32x4_512_load(<4 x i32>* %x0ptr, <16 x i32> %x2, i16 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x4_512_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1
|
|
||||||
; CHECK-NEXT: vmovdqa (%rdi), %xmm1
|
|
||||||
; CHECK-NEXT: vshufi32x4 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%x0 = load <4 x i32>, <4 x i32>* %x0ptr
|
|
||||||
%res = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask)
|
|
||||||
ret <16 x i32> %res
|
|
||||||
}
|
|
||||||
|
|
||||||
declare <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64>, <8 x i64>, i8)
|
|
||||||
|
|
||||||
define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x4_512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x4_512:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1
|
|
||||||
; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm2 {%k1} {z} = zmm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vpaddq %zmm1, %zmm0, %zmm0
|
|
||||||
; CHECK-NEXT: vpaddq %zmm0, %zmm2, %zmm0
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%res1 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 -1)
|
|
||||||
%res2 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask)
|
|
||||||
%res3 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> zeroinitializer, i8 %mask)
|
|
||||||
%res4 = add <8 x i64> %res1, %res2
|
|
||||||
%res5 = add <8 x i64> %res3, %res4
|
|
||||||
ret <8 x i64> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x4_512_load(<4 x i64>* %x0ptr, <8 x i64> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x4_512_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1
|
|
||||||
; CHECK-NEXT: vmovdqa (%rdi), %ymm1
|
|
||||||
; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%x0 = load <4 x i64>, <4 x i64>* %x0ptr
|
|
||||||
%res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask)
|
|
||||||
ret <8 x i64> %res
|
|
||||||
}
|
|
||||||
|
|
||||||
declare <16 x i32> @llvm.x86.avx512.mask.prorv.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
declare <16 x i32> @llvm.x86.avx512.mask.prorv.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
|
||||||
|
|
||||||
define <16 x i32>@test_int_x86_avx512_mask_prorv_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
|
define <16 x i32>@test_int_x86_avx512_mask_prorv_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
|
||||||
|
|
|
||||||
|
|
@ -155,3 +155,141 @@ define <8 x i64>@test_int_x86_avx512_cvtmask2q_512(i8 %x0) {
|
||||||
%res = call <8 x i64> @llvm.x86.avx512.cvtmask2q.512(i8 %x0)
|
%res = call <8 x i64> @llvm.x86.avx512.cvtmask2q.512(i8 %x0)
|
||||||
ret <8 x i64> %res
|
ret <8 x i64> %res
|
||||||
}
|
}
|
||||||
|
|
||||||
|
declare <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float>, <16 x float>, i16)
|
||||||
|
|
||||||
|
define <16 x float>@test_int_x86_avx512_mask_broadcastf32x8_512(<8 x float> %x0, <16 x float> %x2, i16 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x8_512:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
||||||
|
; CHECK-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm2
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1
|
||||||
|
; CHECK-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm1 {%k1}
|
||||||
|
; CHECK-NEXT: vaddps %zmm1, %zmm2, %zmm1
|
||||||
|
; CHECK-NEXT: vinsertf32x8 $1, %ymm0, %zmm0, %zmm0 {%k1} {z}
|
||||||
|
; CHECK-NEXT: vaddps %zmm1, %zmm0, %zmm0
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%res1 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float> %x0, <16 x float> %x2, i16 -1)
|
||||||
|
%res2 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float> %x0, <16 x float> %x2, i16 %mask)
|
||||||
|
%res3 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float> %x0, <16 x float> zeroinitializer, i16 %mask)
|
||||||
|
%res4 = fadd <16 x float> %res1, %res2
|
||||||
|
%res5 = fadd <16 x float> %res3, %res4
|
||||||
|
ret <16 x float> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <16 x float>@test_int_x86_avx512_mask_broadcastf32x8_512_load(<8 x float>* %x0ptr, <16 x float> %x2, i16 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x8_512_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1
|
||||||
|
; CHECK-NEXT: vbroadcastf32x8 {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%x0 = load <8 x float>, <8 x float>* %x0ptr
|
||||||
|
%res = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float> %x0, <16 x float> %x2, i16 %mask)
|
||||||
|
ret <16 x float> %res
|
||||||
|
}
|
||||||
|
|
||||||
|
declare <8 x double> @llvm.x86.avx512.mask.broadcastf64x2.512(<2 x double>, <8 x double>, i8)
|
||||||
|
|
||||||
|
define <8 x double>@test_int_x86_avx512_mask_broadcastf64x2_512(<2 x double> %x0, <8 x double> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x2_512:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
||||||
|
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
|
||||||
|
; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm2
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1
|
||||||
|
; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm1 {%k1}
|
||||||
|
; CHECK-NEXT: vaddpd %zmm1, %zmm2, %zmm1
|
||||||
|
; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 {%k1} {z}
|
||||||
|
; CHECK-NEXT: vaddpd %zmm1, %zmm0, %zmm0
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%res1 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x2.512(<2 x double> %x0, <8 x double> %x2, i8 -1)
|
||||||
|
%res2 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x2.512(<2 x double> %x0, <8 x double> %x2, i8 %mask)
|
||||||
|
%res3 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x2.512(<2 x double> %x0, <8 x double> zeroinitializer, i8 %mask)
|
||||||
|
%res4 = fadd <8 x double> %res1, %res2
|
||||||
|
%res5 = fadd <8 x double> %res3, %res4
|
||||||
|
ret <8 x double> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <8 x double>@test_int_x86_avx512_mask_broadcastf64x2_512_load(<2 x double>* %x0ptr, <8 x double> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x2_512_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1
|
||||||
|
; CHECK-NEXT: vbroadcastf64x2 {{.*#+}} zmm0 {%k1} = mem[0,1,0,1,0,1,0,1]
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%x0 = load <2 x double>, <2 x double>* %x0ptr
|
||||||
|
%res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x2.512(<2 x double> %x0, <8 x double> %x2, i8 %mask)
|
||||||
|
ret <8 x double> %res
|
||||||
|
}
|
||||||
|
|
||||||
|
declare <16 x i32> @llvm.x86.avx512.mask.broadcasti32x8.512(<8 x i32>, <16 x i32>, i16)
|
||||||
|
|
||||||
|
define <16 x i32>@test_int_x86_avx512_mask_broadcasti32x8_512(<8 x i32> %x0, <16 x i32> %x2, i16 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x8_512:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
||||||
|
; CHECK-NEXT: vinserti32x8 $1, %ymm0, %zmm0, %zmm2
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1
|
||||||
|
; CHECK-NEXT: vinserti32x8 $1, %ymm0, %zmm0, %zmm1 {%k1}
|
||||||
|
; CHECK-NEXT: vpaddd %zmm1, %zmm2, %zmm1
|
||||||
|
; CHECK-NEXT: vinserti32x8 $1, %ymm0, %zmm0, %zmm0 {%k1} {z}
|
||||||
|
; CHECK-NEXT: vpaddd %zmm1, %zmm0, %zmm0
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%res1 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x8.512(<8 x i32> %x0, <16 x i32> %x2, i16 -1)
|
||||||
|
%res2 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x8.512(<8 x i32> %x0, <16 x i32> %x2, i16 %mask)
|
||||||
|
%res3 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x8.512(<8 x i32> %x0, <16 x i32> zeroinitializer, i16 %mask)
|
||||||
|
%res4 = add <16 x i32> %res1, %res2
|
||||||
|
%res5 = add <16 x i32> %res3, %res4
|
||||||
|
ret <16 x i32> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <16 x i32>@test_int_x86_avx512_mask_broadcasti32x8_512_load(<8 x i32>* %x0ptr, <16 x i32> %x2, i16 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x8_512_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1
|
||||||
|
; CHECK-NEXT: vbroadcasti32x8 {{.*#+}} zmm0 {%k1} = mem[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%x0 = load <8 x i32>, <8 x i32>* %x0ptr
|
||||||
|
%res = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x8.512(<8 x i32> %x0, <16 x i32> %x2, i16 %mask)
|
||||||
|
ret <16 x i32> %res
|
||||||
|
}
|
||||||
|
|
||||||
|
declare <8 x i64> @llvm.x86.avx512.mask.broadcasti64x2.512(<2 x i64>, <8 x i64>, i8)
|
||||||
|
|
||||||
|
define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x2_512(<2 x i64> %x0, <8 x i64> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x2_512:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
||||||
|
; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
|
||||||
|
; CHECK-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm2
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1
|
||||||
|
; CHECK-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm1 {%k1}
|
||||||
|
; CHECK-NEXT: vpaddq %zmm1, %zmm2, %zmm1
|
||||||
|
; CHECK-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0 {%k1} {z}
|
||||||
|
; CHECK-NEXT: vpaddq %zmm1, %zmm0, %zmm0
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%res1 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x2.512(<2 x i64> %x0, <8 x i64> %x2, i8 -1)
|
||||||
|
%res2 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x2.512(<2 x i64> %x0, <8 x i64> %x2, i8 %mask)
|
||||||
|
%res3 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x2.512(<2 x i64> %x0, <8 x i64> zeroinitializer, i8 %mask)
|
||||||
|
%res4 = add <8 x i64> %res1, %res2
|
||||||
|
%res5 = add <8 x i64> %res3, %res4
|
||||||
|
ret <8 x i64> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x2_512_load(<2 x i64>* %x0ptr, <8 x i64> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x2_512_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1
|
||||||
|
; CHECK-NEXT: vbroadcasti64x2 {{.*#+}} zmm0 {%k1} = mem[0,1,0,1,0,1,0,1]
|
||||||
|
; CHECK-NEXT: retq
|
||||||
|
|
||||||
|
%x0 = load <2 x i64>, <2 x i64>* %x0ptr
|
||||||
|
%res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x2.512(<2 x i64> %x0, <8 x i64> %x2, i8 %mask)
|
||||||
|
ret <8 x i64> %res
|
||||||
|
}
|
||||||
|
|
|
||||||
|
|
@ -461,143 +461,3 @@ define i8@test_int_x86_avx512_cvtq2mask_512(<8 x i64> %x0) {
|
||||||
%res = call i8 @llvm.x86.avx512.cvtq2mask.512(<8 x i64> %x0)
|
%res = call i8 @llvm.x86.avx512.cvtq2mask.512(<8 x i64> %x0)
|
||||||
ret i8 %res
|
ret i8 %res
|
||||||
}
|
}
|
||||||
|
|
||||||
declare <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float>, <16 x float>, i16)
|
|
||||||
|
|
||||||
define <16 x float>@test_int_x86_avx512_mask_broadcastf32x8_512(<8 x float> %x0, <16 x float> %x2, i16 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x8_512:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1
|
|
||||||
; CHECK-NEXT: vshuff32x4 {{.*#+}} zmm2 {%k1} {z} = zmm0[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
|
|
||||||
; CHECK-NEXT: vshuff32x4 {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
|
|
||||||
; CHECK-NEXT: vshuff32x4 {{.*#+}} zmm0 = zmm0[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
|
|
||||||
; CHECK-NEXT: vaddps %zmm1, %zmm0, %zmm0
|
|
||||||
; CHECK-NEXT: vaddps %zmm0, %zmm2, %zmm0
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%res1 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float> %x0, <16 x float> %x2, i16 -1)
|
|
||||||
%res2 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float> %x0, <16 x float> %x2, i16 %mask)
|
|
||||||
%res3 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float> %x0, <16 x float> zeroinitializer, i16 %mask)
|
|
||||||
%res4 = fadd <16 x float> %res1, %res2
|
|
||||||
%res5 = fadd <16 x float> %res3, %res4
|
|
||||||
ret <16 x float> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <16 x float>@test_int_x86_avx512_mask_broadcastf32x8_512_load(<8 x float>* %x0ptr, <16 x float> %x2, i16 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x8_512_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1
|
|
||||||
; CHECK-NEXT: vmovaps (%rdi), %ymm1
|
|
||||||
; CHECK-NEXT: vshuff32x4 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%x0 = load <8 x float>, <8 x float>* %x0ptr
|
|
||||||
%res = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x8.512(<8 x float> %x0, <16 x float> %x2, i16 %mask)
|
|
||||||
ret <16 x float> %res
|
|
||||||
}
|
|
||||||
|
|
||||||
declare <8 x double> @llvm.x86.avx512.mask.broadcastf64x2.512(<2 x double>, <8 x double>, i8)
|
|
||||||
|
|
||||||
define <8 x double>@test_int_x86_avx512_mask_broadcastf64x2_512(<2 x double> %x0, <8 x double> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x2_512:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1
|
|
||||||
; CHECK-NEXT: vshuff64x2 {{.*#+}} zmm2 {%k1} {z} = zmm0[0,1,0,1,0,1,0,1]
|
|
||||||
; CHECK-NEXT: vshuff64x2 {{.*#+}} zmm1 {%k1} = zmm0[0,1,0,1,0,1,0,1]
|
|
||||||
; CHECK-NEXT: vshuff64x2 {{.*#+}} zmm0 = zmm0[0,1,0,1,0,1,0,1]
|
|
||||||
; CHECK-NEXT: vaddpd %zmm1, %zmm0, %zmm0
|
|
||||||
; CHECK-NEXT: vaddpd %zmm0, %zmm2, %zmm0
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%res1 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x2.512(<2 x double> %x0, <8 x double> %x2, i8 -1)
|
|
||||||
%res2 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x2.512(<2 x double> %x0, <8 x double> %x2, i8 %mask)
|
|
||||||
%res3 = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x2.512(<2 x double> %x0, <8 x double> zeroinitializer, i8 %mask)
|
|
||||||
%res4 = fadd <8 x double> %res1, %res2
|
|
||||||
%res5 = fadd <8 x double> %res3, %res4
|
|
||||||
ret <8 x double> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <8 x double>@test_int_x86_avx512_mask_broadcastf64x2_512_load(<2 x double>* %x0ptr, <8 x double> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x2_512_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1
|
|
||||||
; CHECK-NEXT: vmovapd (%rdi), %xmm1
|
|
||||||
; CHECK-NEXT: vshuff64x2 {{.*#+}} zmm0 {%k1} = zmm1[0,1,0,1,0,1,0,1]
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%x0 = load <2 x double>, <2 x double>* %x0ptr
|
|
||||||
%res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x2.512(<2 x double> %x0, <8 x double> %x2, i8 %mask)
|
|
||||||
ret <8 x double> %res
|
|
||||||
}
|
|
||||||
|
|
||||||
declare <16 x i32> @llvm.x86.avx512.mask.broadcasti32x8.512(<8 x i32>, <16 x i32>, i16)
|
|
||||||
|
|
||||||
define <16 x i32>@test_int_x86_avx512_mask_broadcasti32x8_512(<8 x i32> %x0, <16 x i32> %x2, i16 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x8_512:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1
|
|
||||||
; CHECK-NEXT: vshufi32x4 {{.*#+}} zmm2 {%k1} {z} = zmm0[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
|
|
||||||
; CHECK-NEXT: vshufi32x4 {{.*#+}} zmm1 {%k1} = zmm0[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
|
|
||||||
; CHECK-NEXT: vshufi32x4 {{.*#+}} zmm0 = zmm0[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
|
|
||||||
; CHECK-NEXT: vpaddd %zmm1, %zmm0, %zmm0
|
|
||||||
; CHECK-NEXT: vpaddd %zmm0, %zmm2, %zmm0
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%res1 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x8.512(<8 x i32> %x0, <16 x i32> %x2, i16 -1)
|
|
||||||
%res2 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x8.512(<8 x i32> %x0, <16 x i32> %x2, i16 %mask)
|
|
||||||
%res3 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x8.512(<8 x i32> %x0, <16 x i32> zeroinitializer, i16 %mask)
|
|
||||||
%res4 = add <16 x i32> %res1, %res2
|
|
||||||
%res5 = add <16 x i32> %res3, %res4
|
|
||||||
ret <16 x i32> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <16 x i32>@test_int_x86_avx512_mask_broadcasti32x8_512_load(<8 x i32>* %x0ptr, <16 x i32> %x2, i16 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x8_512_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1
|
|
||||||
; CHECK-NEXT: vmovdqa (%rdi), %ymm1
|
|
||||||
; CHECK-NEXT: vshufi32x4 {{.*#+}} zmm0 {%k1} = zmm1[0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%x0 = load <8 x i32>, <8 x i32>* %x0ptr
|
|
||||||
%res = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x8.512(<8 x i32> %x0, <16 x i32> %x2, i16 %mask)
|
|
||||||
ret <16 x i32> %res
|
|
||||||
}
|
|
||||||
|
|
||||||
declare <8 x i64> @llvm.x86.avx512.mask.broadcasti64x2.512(<2 x i64>, <8 x i64>, i8)
|
|
||||||
|
|
||||||
define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x2_512(<2 x i64> %x0, <8 x i64> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x2_512:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1
|
|
||||||
; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm2 {%k1} {z} = zmm0[0,1,0,1,0,1,0,1]
|
|
||||||
; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm1 {%k1} = zmm0[0,1,0,1,0,1,0,1]
|
|
||||||
; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm0[0,1,0,1,0,1,0,1]
|
|
||||||
; CHECK-NEXT: vpaddq %zmm1, %zmm0, %zmm0
|
|
||||||
; CHECK-NEXT: vpaddq %zmm0, %zmm2, %zmm0
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%res1 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x2.512(<2 x i64> %x0, <8 x i64> %x2, i8 -1)
|
|
||||||
%res2 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x2.512(<2 x i64> %x0, <8 x i64> %x2, i8 %mask)
|
|
||||||
%res3 = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x2.512(<2 x i64> %x0, <8 x i64> zeroinitializer, i8 %mask)
|
|
||||||
%res4 = add <8 x i64> %res1, %res2
|
|
||||||
%res5 = add <8 x i64> %res3, %res4
|
|
||||||
ret <8 x i64> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x2_512_load(<2 x i64>* %x0ptr, <8 x i64> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x2_512_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1
|
|
||||||
; CHECK-NEXT: vmovdqa (%rdi), %xmm1
|
|
||||||
; CHECK-NEXT: vshufi64x2 {{.*#+}} zmm0 {%k1} = zmm1[0,1,0,1,0,1,0,1]
|
|
||||||
; CHECK-NEXT: retq
|
|
||||||
|
|
||||||
%x0 = load <2 x i64>, <2 x i64>* %x0ptr
|
|
||||||
%res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x2.512(<2 x i64> %x0, <8 x i64> %x2, i8 %mask)
|
|
||||||
ret <8 x i64> %res
|
|
||||||
}
|
|
||||||
|
|
|
||||||
|
|
@ -1667,3 +1667,73 @@ define <4 x i64>@test_int_x86_avx512_cvtmask2q_256(i8 %x0) {
|
||||||
%res = call <4 x i64> @llvm.x86.avx512.cvtmask2q.256(i8 %x0)
|
%res = call <4 x i64> @llvm.x86.avx512.cvtmask2q.256(i8 %x0)
|
||||||
ret <4 x i64> %res
|
ret <4 x i64> %res
|
||||||
}
|
}
|
||||||
|
|
||||||
|
declare <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double>, <4 x double>, i8)
|
||||||
|
|
||||||
|
define <4 x double>@test_int_x86_avx512_mask_broadcastf64x2_256(<2 x double> %x0, <4 x double> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x2_256:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
||||||
|
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm2 ## EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xd0,0x01]
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
|
||||||
|
; CHECK-NEXT: vinsertf64x2 $1, %xmm0, %ymm0, %ymm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x29,0x18,0xc8,0x01]
|
||||||
|
; CHECK-NEXT: vaddpd %ymm1, %ymm2, %ymm1 ## EVEX TO VEX Compression encoding: [0xc5,0xed,0x58,0xc9]
|
||||||
|
; CHECK-NEXT: vinsertf64x2 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xa9,0x18,0xc0,0x01]
|
||||||
|
; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0x58,0xc1]
|
||||||
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
||||||
|
|
||||||
|
%res1 = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> %x2, i8 -1)
|
||||||
|
%res2 = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> %x2, i8 %mask)
|
||||||
|
%res3 = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> zeroinitializer, i8 %mask)
|
||||||
|
%res4 = fadd <4 x double> %res1, %res2
|
||||||
|
%res5 = fadd <4 x double> %res3, %res4
|
||||||
|
ret <4 x double> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <4 x double>@test_int_x86_avx512_mask_broadcastf64x2_256_load(<2 x double>* %x0ptr, <4 x double> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x2_256_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
|
||||||
|
; CHECK-NEXT: vbroadcastf64x2 (%rdi), %ymm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x29,0x1a,0x07]
|
||||||
|
; CHECK-NEXT: ## ymm0 {%k1} = mem[0,1,0,1]
|
||||||
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
||||||
|
|
||||||
|
%x0 = load <2 x double>, <2 x double>* %x0ptr
|
||||||
|
%res = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> %x2, i8 %mask)
|
||||||
|
ret <4 x double> %res
|
||||||
|
}
|
||||||
|
|
||||||
|
declare <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64>, <4 x i64>, i8)
|
||||||
|
|
||||||
|
define <4 x i64>@test_int_x86_avx512_mask_broadcasti64x2_256(<2 x i64> %x0, <4 x i64> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x2_256:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
||||||
|
; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm2 ## EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x38,0xd0,0x01]
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
|
||||||
|
; CHECK-NEXT: vinserti64x2 $1, %xmm0, %ymm0, %ymm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x29,0x38,0xc8,0x01]
|
||||||
|
; CHECK-NEXT: vpaddq %ymm1, %ymm2, %ymm1 ## EVEX TO VEX Compression encoding: [0xc5,0xed,0xd4,0xc9]
|
||||||
|
; CHECK-NEXT: vinserti64x2 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xa9,0x38,0xc0,0x01]
|
||||||
|
; CHECK-NEXT: vpaddq %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xd4,0xc1]
|
||||||
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
||||||
|
|
||||||
|
%res1 = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> %x2, i8 -1)
|
||||||
|
%res2 = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> %x2, i8 %mask)
|
||||||
|
%res3 = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> zeroinitializer, i8 %mask)
|
||||||
|
%res4 = add <4 x i64> %res1, %res2
|
||||||
|
%res5 = add <4 x i64> %res3, %res4
|
||||||
|
ret <4 x i64> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <4 x i64>@test_int_x86_avx512_mask_broadcasti64x2_256_load(<2 x i64>* %x0ptr, <4 x i64> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x2_256_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
|
||||||
|
; CHECK-NEXT: vbroadcasti64x2 (%rdi), %ymm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x29,0x5a,0x07]
|
||||||
|
; CHECK-NEXT: ## ymm0 {%k1} = mem[0,1,0,1]
|
||||||
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
||||||
|
|
||||||
|
%x0 = load <2 x i64>, <2 x i64>* %x0ptr
|
||||||
|
%res = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> %x2, i8 %mask)
|
||||||
|
ret <4 x i64> %res
|
||||||
|
}
|
||||||
|
|
|
||||||
|
|
@ -743,81 +743,3 @@ define i8@test_int_x86_avx512_cvtq2mask_256(<4 x i64> %x0) {
|
||||||
%res = call i8 @llvm.x86.avx512.cvtq2mask.256(<4 x i64> %x0)
|
%res = call i8 @llvm.x86.avx512.cvtq2mask.256(<4 x i64> %x0)
|
||||||
ret i8 %res
|
ret i8 %res
|
||||||
}
|
}
|
||||||
|
|
||||||
declare <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double>, <4 x double>, i8)
|
|
||||||
|
|
||||||
define <4 x double>@test_int_x86_avx512_mask_broadcastf64x2_256(<2 x double> %x0, <4 x double> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x2_256:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
|
|
||||||
; CHECK-NEXT: vshuff64x2 $0, %ymm0, %ymm0, %ymm2 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xa9,0x23,0xd0,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm2 {%k1} {z} = ymm0[0,1,0,1]
|
|
||||||
; CHECK-NEXT: vshuff64x2 $0, %ymm0, %ymm0, %ymm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x29,0x23,0xc8,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm1 {%k1} = ymm0[0,1,0,1]
|
|
||||||
; CHECK-NEXT: vshuff64x2 $0, %ymm0, %ymm0, %ymm0 ## encoding: [0x62,0xf3,0xfd,0x28,0x23,0xc0,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm0 = ymm0[0,1,0,1]
|
|
||||||
; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0x58,0xc1]
|
|
||||||
; CHECK-NEXT: vaddpd %ymm0, %ymm2, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xed,0x58,0xc0]
|
|
||||||
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
||||||
|
|
||||||
%res1 = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> %x2, i8 -1)
|
|
||||||
%res2 = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> %x2, i8 %mask)
|
|
||||||
%res3 = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> zeroinitializer, i8 %mask)
|
|
||||||
%res4 = fadd <4 x double> %res1, %res2
|
|
||||||
%res5 = fadd <4 x double> %res3, %res4
|
|
||||||
ret <4 x double> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <4 x double>@test_int_x86_avx512_mask_broadcastf64x2_256_load(<2 x double>* %x0ptr, <4 x double> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf64x2_256_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
|
|
||||||
; CHECK-NEXT: vmovapd (%rdi), %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x28,0x0f]
|
|
||||||
; CHECK-NEXT: vshuff64x2 $0, %ymm1, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf3,0xf5,0x29,0x23,0xc1,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm0 {%k1} = ymm1[0,1,0,1]
|
|
||||||
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
||||||
|
|
||||||
%x0 = load <2 x double>, <2 x double>* %x0ptr
|
|
||||||
%res = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> %x2, i8 %mask)
|
|
||||||
ret <4 x double> %res
|
|
||||||
}
|
|
||||||
|
|
||||||
declare <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64>, <4 x i64>, i8)
|
|
||||||
|
|
||||||
define <4 x i64>@test_int_x86_avx512_mask_broadcasti64x2_256(<2 x i64> %x0, <4 x i64> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x2_256:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
|
|
||||||
; CHECK-NEXT: vshufi64x2 $0, %ymm0, %ymm0, %ymm2 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xa9,0x43,0xd0,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm2 {%k1} {z} = ymm0[0,1,0,1]
|
|
||||||
; CHECK-NEXT: vshufi64x2 $0, %ymm0, %ymm0, %ymm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x29,0x43,0xc8,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm1 {%k1} = ymm0[0,1,0,1]
|
|
||||||
; CHECK-NEXT: vshufi64x2 $0, %ymm0, %ymm0, %ymm0 ## encoding: [0x62,0xf3,0xfd,0x28,0x43,0xc0,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm0 = ymm0[0,1,0,1]
|
|
||||||
; CHECK-NEXT: vpaddq %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xd4,0xc1]
|
|
||||||
; CHECK-NEXT: vpaddq %ymm0, %ymm2, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xed,0xd4,0xc0]
|
|
||||||
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
||||||
|
|
||||||
%res1 = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> %x2, i8 -1)
|
|
||||||
%res2 = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> %x2, i8 %mask)
|
|
||||||
%res3 = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> zeroinitializer, i8 %mask)
|
|
||||||
%res4 = add <4 x i64> %res1, %res2
|
|
||||||
%res5 = add <4 x i64> %res3, %res4
|
|
||||||
ret <4 x i64> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <4 x i64>@test_int_x86_avx512_mask_broadcasti64x2_256_load(<2 x i64>* %x0ptr, <4 x i64> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti64x2_256_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
|
|
||||||
; CHECK-NEXT: vmovdqa (%rdi), %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0x0f]
|
|
||||||
; CHECK-NEXT: vshufi64x2 $0, %ymm1, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf3,0xf5,0x29,0x43,0xc1,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm0 {%k1} = ymm1[0,1,0,1]
|
|
||||||
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
||||||
|
|
||||||
%x0 = load <2 x i64>, <2 x i64>* %x0ptr
|
|
||||||
%res = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> %x2, i8 %mask)
|
|
||||||
ret <4 x i64> %res
|
|
||||||
}
|
|
||||||
|
|
|
||||||
|
|
@ -5701,3 +5701,69 @@ define <8 x i8> @test_mask_ucmp_q_128(<2 x i64> %a0, <2 x i64> %a1, i8 %mask) {
|
||||||
}
|
}
|
||||||
|
|
||||||
declare i8 @llvm.x86.avx512.mask.ucmp.q.128(<2 x i64>, <2 x i64>, i32, i8) nounwind readnone
|
declare i8 @llvm.x86.avx512.mask.ucmp.q.128(<2 x i64>, <2 x i64>, i32, i8) nounwind readnone
|
||||||
|
|
||||||
|
declare <8 x float> @llvm.x86.avx512.mask.broadcastf32x4.256(<4 x float>, <8 x float>, i8)
|
||||||
|
|
||||||
|
define <8 x float>@test_int_x86_avx512_mask_broadcastf32x4_256(<4 x float> %x0, <8 x float> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x4_256:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
||||||
|
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm2 ## EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xd0,0x01]
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
|
||||||
|
; CHECK-NEXT: vinsertf32x4 $1, %xmm0, %ymm0, %ymm1 {%k1} ## encoding: [0x62,0xf3,0x7d,0x29,0x18,0xc8,0x01]
|
||||||
|
; CHECK-NEXT: vaddps %ymm1, %ymm2, %ymm1 ## EVEX TO VEX Compression encoding: [0xc5,0xec,0x58,0xc9]
|
||||||
|
; CHECK-NEXT: vinsertf32x4 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xa9,0x18,0xc0,0x01]
|
||||||
|
; CHECK-NEXT: vaddps %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x58,0xc1]
|
||||||
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
||||||
|
%res1 = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x4.256(<4 x float> %x0, <8 x float> %x2, i8 -1)
|
||||||
|
%res2 = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x4.256(<4 x float> %x0, <8 x float> %x2, i8 %mask)
|
||||||
|
%res3 = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x4.256(<4 x float> %x0, <8 x float> zeroinitializer, i8 %mask)
|
||||||
|
%res4 = fadd <8 x float> %res1, %res2
|
||||||
|
%res5 = fadd <8 x float> %res3, %res4
|
||||||
|
ret <8 x float> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <8 x float>@test_int_x86_avx512_mask_broadcastf32x4_256_load(<4 x float>* %x0ptr, <8 x float> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x4_256_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
|
||||||
|
; CHECK-NEXT: vbroadcastf32x4 (%rdi), %ymm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x29,0x1a,0x07]
|
||||||
|
; CHECK-NEXT: ## ymm0 {%k1} = mem[0,1,2,3,0,1,2,3]
|
||||||
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
||||||
|
%x0 = load <4 x float>, <4 x float>* %x0ptr
|
||||||
|
%res = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x4.256(<4 x float> %x0, <8 x float> %x2, i8 %mask)
|
||||||
|
ret <8 x float> %res
|
||||||
|
}
|
||||||
|
|
||||||
|
declare <8 x i32> @llvm.x86.avx512.mask.broadcasti32x4.256(<4 x i32>, <8 x i32>, i8)
|
||||||
|
|
||||||
|
define <8 x i32>@test_int_x86_avx512_mask_broadcasti32x4_256(<4 x i32> %x0, <8 x i32> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x4_256:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
||||||
|
; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm2 ## EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x38,0xd0,0x01]
|
||||||
|
; CHECK-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
|
||||||
|
; CHECK-NEXT: vinserti32x4 $1, %xmm0, %ymm0, %ymm1 {%k1} ## encoding: [0x62,0xf3,0x7d,0x29,0x38,0xc8,0x01]
|
||||||
|
; CHECK-NEXT: vpaddd %ymm1, %ymm2, %ymm1 ## EVEX TO VEX Compression encoding: [0xc5,0xed,0xfe,0xc9]
|
||||||
|
; CHECK-NEXT: vinserti32x4 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xa9,0x38,0xc0,0x01]
|
||||||
|
; CHECK-NEXT: vpaddd %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xfe,0xc1]
|
||||||
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
||||||
|
%res1 = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x4.256(<4 x i32> %x0, <8 x i32> %x2, i8 -1)
|
||||||
|
%res2 = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x4.256(<4 x i32> %x0, <8 x i32> %x2, i8 %mask)
|
||||||
|
%res3 = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x4.256(<4 x i32> %x0, <8 x i32> zeroinitializer, i8 %mask)
|
||||||
|
%res4 = add <8 x i32> %res1, %res2
|
||||||
|
%res5 = add <8 x i32> %res3, %res4
|
||||||
|
ret <8 x i32> %res5
|
||||||
|
}
|
||||||
|
|
||||||
|
define <8 x i32>@test_int_x86_avx512_mask_broadcasti32x4_256_load(<4 x i32>* %x0ptr, <8 x i32> %x2, i8 %mask) {
|
||||||
|
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x4_256_load:
|
||||||
|
; CHECK: ## BB#0:
|
||||||
|
; CHECK-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
|
||||||
|
; CHECK-NEXT: vbroadcasti32x4 (%rdi), %ymm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x29,0x5a,0x07]
|
||||||
|
; CHECK-NEXT: ## ymm0 {%k1} = mem[0,1,2,3,0,1,2,3]
|
||||||
|
; CHECK-NEXT: retq ## encoding: [0xc3]
|
||||||
|
%x0 = load <4 x i32>, <4 x i32>* %x0ptr
|
||||||
|
%res = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x4.256(<4 x i32> %x0, <8 x i32> %x2, i8 %mask)
|
||||||
|
ret <8 x i32> %res
|
||||||
|
}
|
||||||
|
|
|
||||||
|
|
@ -3426,80 +3426,6 @@ define <2 x double> @test_rcp_pd_128_rrk(<2 x double> %a0, <2 x double> %a1, i8
|
||||||
declare <4 x double> @llvm.x86.avx512.rcp14.pd.256(<4 x double>, <4 x double>, i8) nounwind readnone
|
declare <4 x double> @llvm.x86.avx512.rcp14.pd.256(<4 x double>, <4 x double>, i8) nounwind readnone
|
||||||
declare <2 x double> @llvm.x86.avx512.rcp14.pd.128(<2 x double>, <2 x double>, i8) nounwind readnone
|
declare <2 x double> @llvm.x86.avx512.rcp14.pd.128(<2 x double>, <2 x double>, i8) nounwind readnone
|
||||||
|
|
||||||
declare <8 x float> @llvm.x86.avx512.mask.broadcastf32x4.256(<4 x float>, <8 x float>, i8)
|
|
||||||
|
|
||||||
define <8 x float>@test_int_x86_avx512_mask_broadcastf32x4_256(<4 x float> %x0, <8 x float> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x4_256:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
|
|
||||||
; CHECK-NEXT: vshuff32x4 $0, %ymm0, %ymm0, %ymm2 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xa9,0x23,0xd0,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm2 {%k1} {z} = ymm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshuff32x4 $0, %ymm0, %ymm0, %ymm1 {%k1} ## encoding: [0x62,0xf3,0x7d,0x29,0x23,0xc8,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm1 {%k1} = ymm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshuff32x4 $0, %ymm0, %ymm0, %ymm0 ## encoding: [0x62,0xf3,0x7d,0x28,0x23,0xc0,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm0 = ymm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vaddps %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x58,0xc1]
|
|
||||||
; CHECK-NEXT: vaddps %ymm0, %ymm2, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xec,0x58,0xc0]
|
|
||||||
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
||||||
%res1 = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x4.256(<4 x float> %x0, <8 x float> %x2, i8 -1)
|
|
||||||
%res2 = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x4.256(<4 x float> %x0, <8 x float> %x2, i8 %mask)
|
|
||||||
%res3 = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x4.256(<4 x float> %x0, <8 x float> zeroinitializer, i8 %mask)
|
|
||||||
%res4 = fadd <8 x float> %res1, %res2
|
|
||||||
%res5 = fadd <8 x float> %res3, %res4
|
|
||||||
ret <8 x float> %res5
|
|
||||||
}
|
|
||||||
|
|
||||||
define <8 x float>@test_int_x86_avx512_mask_broadcastf32x4_256_load(<4 x float>* %x0ptr, <8 x float> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcastf32x4_256_load:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
|
|
||||||
; CHECK-NEXT: vmovaps (%rdi), %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0x0f]
|
|
||||||
; CHECK-NEXT: vshuff32x4 $0, %ymm1, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf3,0x75,0x29,0x23,0xc1,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm0 {%k1} = ymm1[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
||||||
%x0 = load <4 x float>, <4 x float>* %x0ptr
|
|
||||||
%res = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x4.256(<4 x float> %x0, <8 x float> %x2, i8 %mask)
|
|
||||||
ret <8 x float> %res
|
|
||||||
}
|
|
||||||
|
|
||||||
declare <8 x i32> @llvm.x86.avx512.mask.broadcasti32x4.256(<4 x i32>, <8 x i32>, i8)
|
|
||||||
|
|
||||||
define <8 x i32>@test_int_x86_avx512_mask_broadcasti32x4_256(<4 x i32> %x0, <8 x i32> %x2, i8 %mask) {
|
|
||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x4_256:
|
|
||||||
; CHECK: ## BB#0:
|
|
||||||
; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
|
|
||||||
; CHECK-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
|
|
||||||
; CHECK-NEXT: vshufi32x4 $0, %ymm0, %ymm0, %ymm2 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xa9,0x43,0xd0,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm2 {%k1} {z} = ymm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshufi32x4 $0, %ymm0, %ymm0, %ymm1 {%k1} ## encoding: [0x62,0xf3,0x7d,0x29,0x43,0xc8,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm1 {%k1} = ymm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vshufi32x4 $0, %ymm0, %ymm0, %ymm0 ## encoding: [0x62,0xf3,0x7d,0x28,0x43,0xc0,0x00]
|
|
||||||
; CHECK-NEXT: ## ymm0 = ymm0[0,1,2,3,0,1,2,3]
|
|
||||||
; CHECK-NEXT: vpaddd %ymm1, %ymm0, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xfe,0xc1]
|
|
||||||
; CHECK-NEXT: vpaddd %ymm0, %ymm2, %ymm0 ## EVEX TO VEX Compression encoding: [0xc5,0xed,0xfe,0xc0]
|
|
||||||
; CHECK-NEXT: retq ## encoding: [0xc3]
|
|
||||||
%res1 = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x4.256(<4 x i32> %x0, <8 x i32> %x2, i8 -1)
|
|
||||||
%res2 = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x4.256(<4 x i32> %x0, <8 x i32> %x2, i8 %mask)
|
|
||||||
%res3 = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x4.256(<4 x i32> %x0, <8 x i32> zeroinitializer, i8 %mask)
|
|
||||||
%res4 = add <8 x i32> %res1, %res2
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%res5 = add <8 x i32> %res3, %res4
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ret <8 x i32> %res5
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}
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define <8 x i32>@test_int_x86_avx512_mask_broadcasti32x4_256_load(<4 x i32>* %x0ptr, <8 x i32> %x2, i8 %mask) {
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||||||
; CHECK-LABEL: test_int_x86_avx512_mask_broadcasti32x4_256_load:
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||||||
; CHECK: ## BB#0:
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||||||
; CHECK-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
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||||||
; CHECK-NEXT: vmovdqa (%rdi), %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0x0f]
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||||||
; CHECK-NEXT: vshufi32x4 $0, %ymm1, %ymm1, %ymm0 {%k1} ## encoding: [0x62,0xf3,0x75,0x29,0x43,0xc1,0x00]
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||||||
; CHECK-NEXT: ## ymm0 {%k1} = ymm1[0,1,2,3,0,1,2,3]
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||||||
; CHECK-NEXT: retq ## encoding: [0xc3]
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||||||
%x0 = load <4 x i32>, <4 x i32>* %x0ptr
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|
||||||
%res = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x4.256(<4 x i32> %x0, <8 x i32> %x2, i8 %mask)
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|
||||||
ret <8 x i32> %res
|
|
||||||
}
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|
||||||
|
|
||||||
declare <4 x i32> @llvm.x86.avx512.mask.prorv.d.128(<4 x i32>, <4 x i32>, <4 x i32>, i8)
|
declare <4 x i32> @llvm.x86.avx512.mask.prorv.d.128(<4 x i32>, <4 x i32>, <4 x i32>, i8)
|
||||||
|
|
||||||
define <4 x i32>@test_int_x86_avx512_mask_prorv_d_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, i8 %x3) {
|
define <4 x i32>@test_int_x86_avx512_mask_prorv_d_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, i8 %x3) {
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue