my work on adding segment registers to LEA missed the
disassembler. Remove some code from the disassembler to compensate, unbreaking disassembly of lea's. llvm-svn: 108226
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@ -252,13 +252,8 @@ static bool translateRMRegister(MCInst &mcInst,
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/// @param mcInst - The MCInst to append to.
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/// @param insn - The instruction to extract Mod, R/M, and SIB fields
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/// from.
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/// @param sr - Whether or not to emit the segment register. The
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/// LEA instruction does not expect a segment-register
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/// operand.
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/// @return - 0 on success; nonzero otherwise
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static bool translateRMMemory(MCInst &mcInst,
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InternalInstruction &insn,
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bool sr) {
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static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn) {
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// Addresses in an MCInst are represented as five operands:
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// 1. basereg (register) The R/M base, or (if there is a SIB) the
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// SIB base
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@ -385,10 +380,7 @@ static bool translateRMMemory(MCInst &mcInst,
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mcInst.addOperand(scaleAmount);
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mcInst.addOperand(indexReg);
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mcInst.addOperand(displacement);
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if (sr)
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mcInst.addOperand(segmentReg);
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mcInst.addOperand(segmentReg);
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return false;
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}
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@ -439,9 +431,8 @@ static bool translateRM(MCInst &mcInst,
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case TYPE_M1616:
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case TYPE_M1632:
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case TYPE_M1664:
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return translateRMMemory(mcInst, insn, true);
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case TYPE_LEA:
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return translateRMMemory(mcInst, insn, false);
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return translateRMMemory(mcInst, insn);
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}
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}
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@ -57,3 +57,6 @@
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# CHECK: movq %cr0, %rcx
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0x0f 0x20 0xc1
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# CHECK: leal 4(%rsp), %ecx
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0x8d 0x4c 0x24 0x04
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