replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

R600/SI: Fix zext from i1 to i64 

llvm-svn: 206437
This commit is contained in:
Matt Arsenault 2014-04-17 02:03:08 +00:00
parent 100b24abc5
commit 51df0c1965
3 changed files with 34 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
llvm/lib/Target/R600/SIISelLowering.cpp
View File

@ -972,8 +972,12 @@ SDValue SITargetLowering::LowerZERO_EXTEND(SDValue Op,
return SDValue();
}
return DAG.getNode(ISD::BUILD_PAIR, DL, VT, Op.getOperand(0),
DAG.getConstant(0, MVT::i32));
SDValue Src = Op.getOperand(0);
if (Src.getValueType() != MVT::i32)
Src = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, Src);
SDValue Zero = DAG.getConstant(0, MVT::i32);
return DAG.getNode(ISD::BUILD_PAIR, DL, VT, Src, Zero);
}
//===----------------------------------------------------------------------===//

17
llvm/test/CodeGen/R600/uaddo.ll Normal file
View File

@ -0,0 +1,17 @@
; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
; SI-LABEL: @uaddo_i64_zext
; SI: ADD
; SI: ADDC
; SI: ADDC
define void @uaddo_i64_zext(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
%uadd = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b) nounwind
%val = extractvalue { i64, i1 } %uadd, 0
%carry = extractvalue { i64, i1 } %uadd, 1
%ext = zext i1 %carry to i64
%add2 = add i64 %val, %ext
store i64 %add2, i64 addrspace(1)* %out, align 8
ret void
}

11
llvm/test/CodeGen/R600/zero_extend.ll
View File

@ -26,3 +26,14 @@ entry:
store i32 %1, i32 addrspace(1)* %out
ret void
}
; SI-CHECK-LABEL: @zext_i1_to_i64
; SI-CHECK: V_CMP_EQ_I32
; SI-CHECK: V_CNDMASK_B32
; SI-CHECK: V_MOV_B32_e32 v{{[0-9]+}}, 0
define void @zext_i1_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
%cmp = icmp eq i32 %a, %b
%ext = zext i1 %cmp to i64
store i64 %ext, i64 addrspace(1)* %out, align 8
ret void
}