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llvm-svn: 159300
This commit is contained in:
Chad Rosier 2012-06-27 22:34:28 +00:00
parent 8ad0c272af
commit 51afe6397b
1 changed files with 34 additions and 34 deletions
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68
llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
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@ -187,7 +187,7 @@ struct X86Operand : public MCParsedAsmOperand {
SMLoc getStartLoc() const { return StartLoc; }
/// getEndLoc - Get the location of the last token of this operand.
SMLoc getEndLoc() const { return EndLoc; }
SMRange getLocRange() const { return SMRange(StartLoc, EndLoc); }
virtual void print(raw_ostream &OS) const {}
@ -309,25 +309,25 @@ struct X86Operand : public MCParsedAsmOperand {
}
bool isMem() const { return Kind == Memory; }
bool isMem8() const {
bool isMem8() const {
return Kind == Memory && (!Mem.Size || Mem.Size == 8);
}
bool isMem16() const {
bool isMem16() const {
return Kind == Memory && (!Mem.Size || Mem.Size == 16);
}
bool isMem32() const {
bool isMem32() const {
return Kind == Memory && (!Mem.Size || Mem.Size == 32);
}
bool isMem64() const {
bool isMem64() const {
return Kind == Memory && (!Mem.Size || Mem.Size == 64);
}
bool isMem80() const {
bool isMem80() const {
return Kind == Memory && (!Mem.Size || Mem.Size == 80);
}
bool isMem128() const {
bool isMem128() const {
return Kind == Memory && (!Mem.Size || Mem.Size == 128);
}
bool isMem256() const {
bool isMem256() const {
return Kind == Memory && (!Mem.Size || Mem.Size == 256);
}
@ -356,26 +356,26 @@ struct X86Operand : public MCParsedAsmOperand {
addExpr(Inst, getImm());
}
void addMem8Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
void addMem8Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
}
void addMem16Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
void addMem16Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
}
void addMem32Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
void addMem32Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
}
void addMem64Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
void addMem64Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
}
void addMem80Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
void addMem80Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
}
void addMem128Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
void addMem128Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
}
void addMem256Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
void addMem256Operands(MCInst &Inst, unsigned N) const {
addMemOperands(Inst, N);
}
void addMemOperands(MCInst &Inst, unsigned N) const {
@ -467,7 +467,7 @@ bool X86AsmParser::isSrcOp(X86Operand &Op) {
bool X86AsmParser::isDstOp(X86Operand &Op) {
unsigned basereg = is64BitMode() ? X86::RDI : X86::EDI;
return Op.isMem() &&
return Op.isMem() &&
(Op.Mem.SegReg == 0 || Op.Mem.SegReg == X86::ES) &&
isa<MCConstantExpr>(Op.Mem.Disp) &&
cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 &&
@ -611,7 +611,7 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
if (getLexer().isNot(AsmToken::LBrac))
return ErrorOperand(Start, "Expected '[' token!");
Parser.Lex();
if (getLexer().is(AsmToken::Identifier)) {
// Parse BaseReg
if (ParseRegister(BaseReg, Start, End)) {
@ -668,7 +668,7 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
End = Parser.getTok().getLoc();
if (!IndexReg)
ParseRegister(IndexReg, Start, End);
else if (getParser().ParseExpression(Disp, End)) return 0;
else if (getParser().ParseExpression(Disp, End)) return 0;
}
}
@ -947,7 +947,7 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
if (PatchedName.startswith("set") && PatchedName.endswith("b") &&
PatchedName != "setb" && PatchedName != "setnb")
PatchedName = PatchedName.substr(0, Name.size()-1);
// FIXME: Hack to recognize cmp<comparison code>{ss,sd,ps,pd}.
const MCExpr *ExtraImmOp = 0;
if ((PatchedName.startswith("cmp") || PatchedName.startswith("vcmp")) &&
@ -1220,7 +1220,7 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
}
}
}
// Transforms "int $3" into "int3" as a size optimization. We can't write an
// instalias with an immediate operand yet.
if (Name == "int" && Operands.size() == 2) {
@ -1523,7 +1523,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
case Match_Success:
// Some instructions need post-processing to, for example, tweak which
// encoding is selected. Loop on it while changes happen so the
// individual transformations can chain off each other.
// individual transformations can chain off each other.
while (processInstruction(Inst, Operands))
;
@ -1561,12 +1561,12 @@ MatchAndEmitInstruction(SMLoc IDLoc,
// Otherwise, we assume that this may be an integer instruction, which comes
// in 8/16/32/64-bit forms using the b,w,l,q suffixes respectively.
const char *Suffixes = Base[0] != 'f' ? "bwlq" : "slt\0";
// Check for the various suffix matches.
Tmp[Base.size()] = Suffixes[0];
unsigned ErrorInfoIgnore;
unsigned Match1, Match2, Match3, Match4;
Match1 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore);
Tmp[Base.size()] = Suffixes[1];
Match2 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore);
@ -1694,19 +1694,19 @@ bool X86AsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) {
const MCExpr *Value;
if (getParser().ParseExpression(Value))
return true;
getParser().getStreamer().EmitValue(Value, Size, 0 /*addrspace*/);
if (getLexer().is(AsmToken::EndOfStatement))
break;
// FIXME: Improve diagnostic.
if (getLexer().isNot(AsmToken::Comma))
return Error(L, "unexpected token in directive");
Parser.Lex();
}
}
Parser.Lex();
return false;
}