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[AMDGPU] Add infer address spaces pass before SROA 

It adds it for the target after inlining but before SROA where
we can get most out of it.

Differential Revision: https://reviews.llvm.org/D34366

llvm-svn: 305759
This commit is contained in:
Stanislav Mekhanoshin 2017-06-19 23:17:36 +00:00
parent 9565c75b29
commit 50c2f251f5
2 changed files with 18 additions and 0 deletions
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8
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
View File

@ -342,6 +342,14 @@ void AMDGPUTargetMachine::adjustPassManager(PassManagerBuilder &Builder) {
PM.add(createAMDGPUExternalAAWrapperPass()); PM.add(createAMDGPUExternalAAWrapperPass());
} }
}); });
Builder.addExtension(
PassManagerBuilder::EP_CGSCCOptimizerLate,
[](const PassManagerBuilder &, legacy::PassManagerBase &PM) {
// Add infer address spaces pass to the opt pipeline after inlining
// but before SROA to increase SROA opportunities.
PM.add(createInferAddressSpacesPass());
});
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//

10
llvm/test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll Normal file
View File

@ -0,0 +1,10 @@
; RUN: opt -mtriple=amdgcn--amdhsa -disable-output -disable-verify -debug-pass=Structure -O2 %s 2>&1 | FileCheck -check-prefix=GCN %s
; GCN: Function Integration/Inlining
; GCN: FunctionPass Manager
; GCN: Infer address spaces
; GCN: SROA
define void @empty() {
ret void
}