parent
b3dc4ad5b4
commit
4ab50b93c8
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@ -2882,13 +2882,21 @@ Instruction *InstCombiner::visitUDiv(BinaryOperator &I) {
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if (Instruction *Common = commonIDivTransforms(I))
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if (Instruction *Common = commonIDivTransforms(I))
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return Common;
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return Common;
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// X udiv C^2 -> X >> C
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// Check to see if this is an unsigned division with an exact power of 2,
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// if so, convert to a right shift.
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if (ConstantInt *C = dyn_cast<ConstantInt>(Op1)) {
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if (ConstantInt *C = dyn_cast<ConstantInt>(Op1)) {
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// X udiv C^2 -> X >> C
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// Check to see if this is an unsigned division with an exact power of 2,
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// if so, convert to a right shift.
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if (C->getValue().isPowerOf2()) // 0 not included in isPowerOf2
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if (C->getValue().isPowerOf2()) // 0 not included in isPowerOf2
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return BinaryOperator::CreateLShr(Op0,
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return BinaryOperator::CreateLShr(Op0,
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ConstantInt::get(Op0->getType(), C->getValue().logBase2()));
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ConstantInt::get(Op0->getType(), C->getValue().logBase2()));
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// X udiv C, where C >= signbit
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if (C->getValue().isNegative()) {
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Value *IC = InsertNewInstBefore(new ICmpInst(ICmpInst::ICMP_ULT, Op0, C),
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I);
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return SelectInst::Create(IC, Constant::getNullValue(I.getType()),
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ConstantInt::get(I.getType(), 1));
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}
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}
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}
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// X udiv (C1 << N), where C1 is "1<<C2" --> X >> (N+C2)
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// X udiv (C1 << N), where C1 is "1<<C2" --> X >> (N+C2)
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@ -0,0 +1,6 @@
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep div
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define i8 @test(i8 %x) readnone nounwind {
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%A = udiv i8 %x, 250
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ret i8 %A
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}
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@ -1,16 +1,11 @@
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis > %t1.ll
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis > %t1.ll
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; RUN: grep udiv %t1.ll | count 3
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; RUN: grep udiv %t1.ll | count 2
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; RUN: grep zext %t1.ll | count 3
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; RUN: grep zext %t1.ll | count 2
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; PR2274
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; PR2274
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; The udiv instructions shouldn't be optimized away, and the
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; The udiv instructions shouldn't be optimized away, and the
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; sext instructions should be optimized to zext.
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; sext instructions should be optimized to zext.
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define i64 @foo(i32 %x) nounwind {
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%r = udiv i32 %x, -1
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%z = sext i32 %r to i64
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ret i64 %z
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}
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define i64 @bar(i32 %x) nounwind {
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define i64 @bar(i32 %x) nounwind {
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%y = lshr i32 %x, 30
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%y = lshr i32 %x, 30
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%r = udiv i32 %y, 3
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%r = udiv i32 %y, 3
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