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Compress MCRegisterInfo register name tables. 

Store (debugging) register names as offsets into a string table instead
of as char pointers.

llvm-svn: 157449
This commit is contained in:
Jakob Stoklund Olesen 2012-05-25 00:21:41 +00:00
parent 315a0c79f3
commit 49ea89ee2d
3 changed files with 25 additions and 9 deletions
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13
llvm/include/llvm/MC/MCRegisterInfo.h
View File

@ -106,10 +106,10 @@ public:
/// of AX.
///
struct MCRegisterDesc {
const char *Name; // Printable name for the reg (for debugging)
uint32_t Overlaps; // Overlapping registers, described above
uint32_t SubRegs; // Sub-register set, described above
uint32_t SuperRegs; // Super-register set, described above
uint32_t Name; // Printable name for the reg (for debugging)
uint32_t Overlaps; // Overlapping registers, described above
uint32_t SubRegs; // Sub-register set, described above
uint32_t SuperRegs; // Super-register set, described above
};
/// MCRegisterInfo base class - We assume that the target defines a static
@ -143,6 +143,7 @@ private:
const MCRegisterClass *Classes; // Pointer to the regclass array
unsigned NumClasses; // Number of entries in the array
const uint16_t *RegLists; // Pointer to the reglists array
const char *RegStrings; // Pointer to the string table.
const uint16_t *SubRegIndices; // Pointer to the subreg lookup
// array.
unsigned NumSubRegIndices; // Number of subreg indices.
@ -165,6 +166,7 @@ public:
void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA,
const MCRegisterClass *C, unsigned NC,
const uint16_t *RL,
const char *Strings,
const uint16_t *SubIndices,
unsigned NumIndices,
const uint16_t *RET) {
@ -173,6 +175,7 @@ public:
RAReg = RA;
Classes = C;
RegLists = RL;
RegStrings = Strings;
NumClasses = NC;
SubRegIndices = SubIndices;
NumSubRegIndices = NumIndices;
@ -301,7 +304,7 @@ public:
/// getName - Return the human-readable symbolic target-specific name for the
/// specified physical register.
const char *getName(unsigned RegNo) const {
return get(RegNo).Name;
return RegStrings + get(RegNo).Name;
}
/// getNumRegs - Return the number of registers this target has (useful for

2
llvm/lib/MC/MCDisassembler/EDDisassembler.cpp
View File

@ -256,7 +256,7 @@ void EDDisassembler::initMaps(const MCRegisterInfo &registerInfo) {
unsigned registerIndex;
for (registerIndex = 0; registerIndex < numRegisters; ++registerIndex) {
const char* registerName = registerInfo.get(registerIndex).Name;
const char* registerName = registerInfo.getName(registerIndex);
RegVec.push_back(registerName);
RegRMap[registerName] = registerIndex;

19
llvm/utils/TableGen/RegisterInfoEmitter.cpp
View File

@ -474,10 +474,14 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
SmallVector<RegVec, 4> OverlapLists(Regs.size());
SequenceToOffsetTable<RegVec, CodeGenRegister::Less> RegSeqs;
SequenceToOffsetTable<std::string> RegStrings;
// Precompute register lists for the SequenceToOffsetTable.
for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
const CodeGenRegister *Reg = Regs[i];
RegStrings.add(Reg->getName());
// Compute the ordered sub-register list.
SetVector<const CodeGenRegister*> SR;
Reg->addSubRegsPreOrder(SR, RegBank);
@ -526,14 +530,20 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
RegSeqs.emit(OS, printRegister);
OS << "};\n\n";
// Emit the string table.
RegStrings.layout();
OS << "extern const char " << TargetName << "RegStrings[] = {\n";
RegStrings.emit(OS, printChar);
OS << "};\n\n";
OS << "extern const MCRegisterDesc " << TargetName
<< "RegDesc[] = { // Descriptors\n";
OS << " { \"NOREG\", 0, 0, 0 },\n";
OS << " { " << RegStrings.get("") << ", 0, 0, 0 },\n";
// Emit the register descriptors now.
for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
const CodeGenRegister *Reg = Regs[i];
OS << " { \"" << Reg->getName() << "\", "
OS << " { " << RegStrings.get(Reg->getName()) << ", "
<< RegSeqs.get(OverlapLists[i]) << ", "
<< RegSeqs.get(SubRegLists[i]) << ", "
<< RegSeqs.get(Reg->getSuperRegs()) << " },\n";
@ -658,7 +668,8 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
<< "unsigned DwarfFlavour = 0, unsigned EHFlavour = 0) {\n";
OS << " RI->InitMCRegisterInfo(" << TargetName << "RegDesc, "
<< Regs.size()+1 << ", RA, " << TargetName << "MCRegisterClasses, "
<< RegisterClasses.size() << ", " << TargetName << "RegLists, ";
<< RegisterClasses.size() << ", " << TargetName << "RegLists, "
<< TargetName << "RegStrings, ";
if (SubRegIndices.size() != 0)
OS << "(uint16_t*)" << TargetName << "SubRegTable, "
<< SubRegIndices.size() << ",\n";
@ -1016,6 +1027,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
// Emit the constructor of the class...
OS << "extern const MCRegisterDesc " << TargetName << "RegDesc[];\n";
OS << "extern const uint16_t " << TargetName << "RegLists[];\n";
OS << "extern const char " << TargetName << "RegStrings[];\n";
if (SubRegIndices.size() != 0)
OS << "extern const uint16_t *get" << TargetName
<< "SubRegTable();\n";
@ -1032,6 +1044,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
<< Regs.size()+1 << ", RA,\n " << TargetName
<< "MCRegisterClasses, " << RegisterClasses.size() << ",\n"
<< " " << TargetName << "RegLists,\n"
<< " " << TargetName << "RegStrings,\n"
<< " ";
if (SubRegIndices.size() != 0)
OS << "get" << TargetName << "SubRegTable(), "