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Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it! 

llvm-svn: 48515
This commit is contained in:
Evan Cheng 2008-03-18 23:36:35 +00:00
parent 4799ea70ea
commit 484064370a
2 changed files with 21 additions and 6 deletions
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16
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -1746,18 +1746,22 @@ SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
if (IsTailCall)
Ops.push_back(DAG.getConstant(FPDiff, MVT::i32));
// Add an implicit use GOT pointer in EBX.
if (!IsTailCall && !Is64Bit &&
getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
Subtarget->isPICStyleGOT())
Ops.push_back(DAG.getRegister(X86::EBX, getPointerTy()));
// Add argument registers to the end of the list so that they are known live
// into the call.
for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
RegsToPass[i].second.getValueType()));
// Add an implicit use GOT pointer in EBX.
if (!IsTailCall && !Is64Bit &&
getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
Subtarget->isPICStyleGOT())
Ops.push_back(DAG.getRegister(X86::EBX, getPointerTy()));
// Add an implicit use of AL for x86 vararg functions.
if (Is64Bit && isVarArg)
Ops.push_back(DAG.getRegister(X86::AL, MVT::i8));
if (InFlag.Val)
Ops.push_back(InFlag);

11
llvm/test/CodeGen/X86/x86-64-varargs.ll Normal file
View File

@ -0,0 +1,11 @@
; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -code-model=large -relocation-model=static | grep call | not grep rax
@.str = internal constant [26 x i8] c"%d, %f, %d, %lld, %d, %f\0A\00" ; <[26 x i8]*> [#uses=1]
declare i32 @printf(i8*, ...) nounwind
define i32 @main() nounwind {
entry:
%tmp10.i = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([26 x i8]* @.str, i32 0, i64 0), i32 12, double 0x3FF3EB8520000000, i32 120, i64 123456677890, i32 -10, double 4.500000e+15 ) nounwind ; <i32> [#uses=0]
ret i32 0
}