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For this pattern, ROTR is the cheaper option. 

llvm-svn: 55576
This commit is contained in:
Bill Wendling 2008-08-31 01:04:56 +00:00
parent fc72416447
commit 4822a7ac8a
1 changed files with 4 additions and 4 deletions
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8
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -2075,14 +2075,14 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS) {
}
} else if (LExtOp0.getOpcode() == ISD::SUB &&
RExtOp0 == LExtOp0.getOperand(1)) {
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext y))) ->
// (rotr x, y)
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext y))) ->
// (rotl x, (sub 32, y))
if (ConstantSDNode *SUBC = cast<ConstantSDNode>(LExtOp0.getOperand(0))) {
if (SUBC->getAPIntValue() == OpSizeInBits) {
return DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, VT, LHSShiftArg,
HasROTL ? LHSShiftAmt : RHSShiftAmt).getNode();
return DAG.getNode(HasROTR ? ISD::ROTR : ISD::ROTL, VT, LHSShiftArg,
HasROTR ? RHSShiftAmt : LHSShiftAmt).getNode();
}
}
}