misched preparation: modularize schedule verification.
ScheduleDAG will not refer to the scheduled instruction sequence. llvm-svn: 152204
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@ -543,9 +543,9 @@ namespace llvm {
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virtual void addCustomGraphFeatures(GraphWriter<ScheduleDAG*> &) const {}
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virtual void addCustomGraphFeatures(GraphWriter<ScheduleDAG*> &) const {}
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#ifndef NDEBUG
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#ifndef NDEBUG
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/// VerifySchedule - Verify that all SUnits were scheduled and that
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/// VerifyScheduledDAG - Verify that all SUnits were scheduled and that
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/// their state is consistent.
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/// their state is consistent. Return the number of scheduled SUnits.
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void VerifySchedule(bool isBottomUp);
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unsigned VerifyScheduledDAG(bool isBottomUp);
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#endif
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#endif
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protected:
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protected:
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@ -703,6 +703,12 @@ void SchedulePostRATDList::ListScheduleTopDown() {
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}
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}
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#ifndef NDEBUG
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#ifndef NDEBUG
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VerifySchedule(/*isBottomUp=*/false);
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unsigned ScheduledNodes = VerifyScheduledDAG(/*isBottomUp=*/false);
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#endif
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unsigned Noops = 0;
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for (unsigned i = 0, e = Sequence.size(); i != e; ++i)
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if (!Sequence[i])
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++Noops;
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assert(Sequence.size() - Noops == ScheduledNodes &&
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"The number of nodes scheduled doesn't match the expected number!");
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#endif // NDEBUG
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}
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}
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@ -346,13 +346,12 @@ void SUnit::dumpAll(const ScheduleDAG *G) const {
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}
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}
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#ifndef NDEBUG
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#ifndef NDEBUG
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/// VerifySchedule - Verify that all SUnits were scheduled and that
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/// VerifyScheduledDAG - Verify that all SUnits were scheduled and that
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/// their state is consistent.
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/// their state is consistent. Return the number of scheduled nodes.
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///
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///
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void ScheduleDAG::VerifySchedule(bool isBottomUp) {
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unsigned ScheduleDAG::VerifyScheduledDAG(bool isBottomUp) {
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bool AnyNotSched = false;
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bool AnyNotSched = false;
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unsigned DeadNodes = 0;
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unsigned DeadNodes = 0;
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unsigned Noops = 0;
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for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
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for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
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if (!SUnits[i].isScheduled) {
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if (!SUnits[i].isScheduled) {
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if (SUnits[i].NumPreds == 0 && SUnits[i].NumSuccs == 0) {
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if (SUnits[i].NumPreds == 0 && SUnits[i].NumSuccs == 0) {
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@ -393,12 +392,8 @@ void ScheduleDAG::VerifySchedule(bool isBottomUp) {
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}
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}
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}
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}
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}
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}
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for (unsigned i = 0, e = Sequence.size(); i != e; ++i)
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if (!Sequence[i])
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++Noops;
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assert(!AnyNotSched);
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assert(!AnyNotSched);
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assert(Sequence.size() + DeadNodes - Noops == SUnits.size() &&
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return SUnits.size() - DeadNodes;
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"The number of nodes scheduled doesn't match the expected number!");
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}
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}
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#endif
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#endif
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@ -630,7 +630,7 @@ void ScheduleDAGFast::ListScheduleBottomUp() {
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std::reverse(Sequence.begin(), Sequence.end());
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std::reverse(Sequence.begin(), Sequence.end());
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#ifndef NDEBUG
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#ifndef NDEBUG
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VerifySchedule(/*isBottomUp=*/true);
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VerifyScheduledSequence(/*isBottomUp=*/true);
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#endif
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#endif
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}
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}
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@ -1475,7 +1475,7 @@ void ScheduleDAGRRList::ListScheduleBottomUp() {
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std::reverse(Sequence.begin(), Sequence.end());
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std::reverse(Sequence.begin(), Sequence.end());
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#ifndef NDEBUG
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#ifndef NDEBUG
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VerifySchedule(/*isBottomUp=*/true);
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VerifyScheduledSequence(/*isBottomUp=*/true);
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#endif
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#endif
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}
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}
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@ -621,6 +621,21 @@ void ScheduleDAGSDNodes::dumpNode(const SUnit *SU) const {
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}
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}
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}
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}
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#ifndef NDEBUG
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/// VerifyScheduledSequence - Verify that all SUnits were scheduled and that
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/// their state is consistent with the nodes listed in Sequence.
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///
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void ScheduleDAGSDNodes::VerifyScheduledSequence(bool isBottomUp) {
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unsigned ScheduledNodes = ScheduleDAG::VerifyScheduledDAG(isBottomUp);
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unsigned Noops = 0;
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for (unsigned i = 0, e = Sequence.size(); i != e; ++i)
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if (!Sequence[i])
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++Noops;
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assert(Sequence.size() - Noops == ScheduledNodes &&
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"The number of nodes scheduled doesn't match the expected number!");
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}
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#endif // NDEBUG
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namespace {
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namespace {
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struct OrderSorter {
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struct OrderSorter {
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bool operator()(const std::pair<unsigned, MachineInstr*> &A,
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bool operator()(const std::pair<unsigned, MachineInstr*> &A,
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@ -111,6 +111,10 @@ namespace llvm {
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///
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///
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virtual void Schedule() = 0;
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virtual void Schedule() = 0;
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/// VerifyScheduledSequence - Verify that all SUnits are scheduled and
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/// consistent with the Sequence of scheduled instructions.
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void VerifyScheduledSequence(bool isBottomUp);
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virtual void dumpNode(const SUnit *SU) const;
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virtual void dumpNode(const SUnit *SU) const;
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virtual std::string getGraphNodeLabel(const SUnit *SU) const;
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virtual std::string getGraphNodeLabel(const SUnit *SU) const;
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@ -261,7 +261,7 @@ void ScheduleDAGVLIW::listScheduleTopDown() {
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}
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}
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#ifndef NDEBUG
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#ifndef NDEBUG
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VerifySchedule(/*isBottomUp=*/false);
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VerifyScheduledSequence(/*isBottomUp=*/false);
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#endif
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#endif
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}
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}
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