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The CELL backend cannot select patterns for vector trunc-store and shl on v2i64; CellSPU/shift_ops.ll fails when promoting elements. 

llvm-svn: 142081
This commit is contained in:
Nadav Rotem 2011-10-15 20:05:17 +00:00
parent 097106b77a
commit 45f0f87af5
1 changed files with 9 additions and 0 deletions
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9
llvm/lib/Target/CellSPU/SPUISelLowering.cpp
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@ -424,6 +424,13 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
setOperationAction(ISD::UDIV, VT, Expand);
setOperationAction(ISD::UREM, VT, Expand);
// Expand all trunc stores
for (unsigned j = (unsigned)MVT::FIRST_VECTOR_VALUETYPE;
j <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++j) {
MVT::SimpleValueType TargetVT = (MVT::SimpleValueType)j;
setTruncStoreAction(VT, TargetVT, Expand);
}
// Custom lower build_vector, constant pool spills, insert and
// extract vector elements:
setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
@ -434,6 +441,8 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
}
setOperationAction(ISD::SHL, MVT::v2i64, Expand);
setOperationAction(ISD::AND, MVT::v16i8, Custom);
setOperationAction(ISD::OR, MVT::v16i8, Custom);
setOperationAction(ISD::XOR, MVT::v16i8, Custom);