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[InstCombine] Only propagate known leading zeros from udiv input to output. 

Put in a conservatively correct estimate for now. Avoids miscompiling
clang in FDO mode. This is really tricky to trigger in reality as
basically all interesting cases will be folded away by computeKnownBits
earlier, I was unable to find a reasonably small test case.

llvm-svn: 331975
This commit is contained in:
Benjamin Kramer 2018-05-10 11:45:18 +00:00
parent 70f4eaf699
commit 456f473ea8
1 changed files with 7 additions and 2 deletions
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9
llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
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@ -554,10 +554,15 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
break;
// FIXME: Take the demanded mask of the result into account.
unsigned RHSTrailingZeros = SA->countTrailingZeros();
APInt DemandedMaskIn =
APInt::getHighBitsSet(BitWidth, BitWidth - SA->countTrailingZeros());
if (SimplifyDemandedBits(I, 0, DemandedMaskIn, Known, Depth + 1))
APInt::getHighBitsSet(BitWidth, BitWidth - RHSTrailingZeros);
if (SimplifyDemandedBits(I, 0, DemandedMaskIn, LHSKnown, Depth + 1))
return I;
// Propagate zero bits from the input.
Known.Zero.setHighBits(std::min(
BitWidth, LHSKnown.Zero.countLeadingOnes() + RHSTrailingZeros));
}
break;
}