[WebAssembly] Tidy up `let` statements in .td files (NFC)

Summary:
- Delete {} for one-line `let` statements
- Don't indent within `let` blocks
- Add comments after `let` block's closing braces

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57730

llvm-svn: 353248
This commit is contained in:
Heejin Ahn 2019-02-06 00:17:03 +00:00
parent ab4f7f144a
commit 4367587fc6
5 changed files with 59 additions and 71 deletions

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@ -748,10 +748,9 @@ multiclass TerRMWPattern<PatFrag rmw_32, PatFrag rmw_64, NI inst_32,
def : TerRMWPatExternSymOffOnly<i64, rmw_64, inst_64>;
}
let Predicates = [HasAtomics] in {
let Predicates = [HasAtomics] in
defm : TerRMWPattern<atomic_cmp_swap_32, atomic_cmp_swap_64,
ATOMIC_RMW_CMPXCHG_I32, ATOMIC_RMW_CMPXCHG_I64>;
} // Predicates = [HasAtomics]
// Truncating & zero-extending ternary RMW patterns.
// DAG legalization & optimization before instruction selection may introduce
@ -885,13 +884,12 @@ multiclass TerRMWTruncExtPattern<
def : TerRMWPatExternSymOffOnly<i64, sext_ter_rmw_16_64<rmw_16>, inst16_64>;
}
let Predicates = [HasAtomics] in {
let Predicates = [HasAtomics] in
defm : TerRMWTruncExtPattern<
atomic_cmp_swap_8, atomic_cmp_swap_16, atomic_cmp_swap_32, atomic_cmp_swap_64,
ATOMIC_RMW8_U_CMPXCHG_I32, ATOMIC_RMW16_U_CMPXCHG_I32,
ATOMIC_RMW8_U_CMPXCHG_I64, ATOMIC_RMW16_U_CMPXCHG_I64,
ATOMIC_RMW32_U_CMPXCHG_I64>;
}
//===----------------------------------------------------------------------===//
// Atomic wait / notify

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@ -21,7 +21,7 @@ defm ADJCALLSTACKDOWN : NRI<(outs), (ins i32imm:$amt, i32imm:$amt2),
[(WebAssemblycallseq_start timm:$amt, timm:$amt2)]>;
defm ADJCALLSTACKUP : NRI<(outs), (ins i32imm:$amt, i32imm:$amt2),
[(WebAssemblycallseq_end timm:$amt, timm:$amt2)]>;
} // isCodeGenOnly = 1
} // Uses = [SP32, SP64], Defs = [SP32, SP64], isCodeGenOnly = 1
multiclass CALL<WebAssemblyRegClass vt, string prefix> {
defm CALL_#vt : I<(outs vt:$dst), (ins function32_op:$callee, variable_ops),
@ -31,13 +31,12 @@ multiclass CALL<WebAssemblyRegClass vt, string prefix> {
!strconcat(prefix, "call\t$callee"),
0x10>;
let isCodeGenOnly = 1 in {
defm PCALL_INDIRECT_#vt : I<(outs vt:$dst), (ins I32:$callee, variable_ops),
(outs), (ins I32:$callee),
[(set vt:$dst, (WebAssemblycall1 I32:$callee))],
"PSEUDO CALL INDIRECT\t$callee",
"PSEUDO CALL INDIRECT\t$callee">;
} // isCodeGenOnly = 1
let isCodeGenOnly = 1 in
defm PCALL_INDIRECT_#vt : I<(outs vt:$dst), (ins I32:$callee, variable_ops),
(outs), (ins I32:$callee),
[(set vt:$dst, (WebAssemblycall1 I32:$callee))],
"PSEUDO CALL INDIRECT\t$callee",
"PSEUDO CALL INDIRECT\t$callee">;
defm CALL_INDIRECT_#vt : I<(outs vt:$dst),
(ins TypeIndex:$type, i32imm:$flags, variable_ops),
@ -59,16 +58,15 @@ multiclass SIMD_CALL<ValueType vt, string prefix> {
0x10>,
Requires<[HasSIMD128]>;
let isCodeGenOnly = 1 in {
defm PCALL_INDIRECT_#vt : I<(outs V128:$dst),
(ins I32:$callee, variable_ops),
(outs), (ins I32:$callee),
[(set (vt V128:$dst),
(WebAssemblycall1 I32:$callee))],
"PSEUDO CALL INDIRECT\t$callee",
"PSEUDO CALL INDIRECT\t$callee">,
let isCodeGenOnly = 1 in
defm PCALL_INDIRECT_#vt : I<(outs V128:$dst),
(ins I32:$callee, variable_ops),
(outs), (ins I32:$callee),
[(set (vt V128:$dst),
(WebAssemblycall1 I32:$callee))],
"PSEUDO CALL INDIRECT\t$callee",
"PSEUDO CALL INDIRECT\t$callee">,
Requires<[HasSIMD128]>;
} // isCodeGenOnly = 1
defm CALL_INDIRECT_#vt : I<(outs V128:$dst),
(ins TypeIndex:$type, i32imm:$flags, variable_ops),
@ -77,44 +75,43 @@ multiclass SIMD_CALL<ValueType vt, string prefix> {
!strconcat(prefix, "call_indirect\t$dst"),
!strconcat(prefix, "call_indirect\t$type"),
0x11>,
Requires<[HasSIMD128]>;
Requires<[HasSIMD128]>;
}
let Uses = [SP32, SP64], isCall = 1 in {
defm "" : CALL<I32, "i32.">;
defm "" : CALL<I64, "i64.">;
defm "" : CALL<F32, "f32.">;
defm "" : CALL<F64, "f64.">;
defm "" : CALL<EXCEPT_REF, "except_ref.">;
defm "" : SIMD_CALL<v16i8, "v128.">;
defm "" : SIMD_CALL<v8i16, "v128.">;
defm "" : SIMD_CALL<v4i32, "v128.">;
defm "" : SIMD_CALL<v2i64, "v128.">;
defm "" : SIMD_CALL<v4f32, "v128.">;
defm "" : SIMD_CALL<v2f64, "v128.">;
defm "" : CALL<I32, "i32.">;
defm "" : CALL<I64, "i64.">;
defm "" : CALL<F32, "f32.">;
defm "" : CALL<F64, "f64.">;
defm "" : CALL<EXCEPT_REF, "except_ref.">;
defm "" : SIMD_CALL<v16i8, "v128.">;
defm "" : SIMD_CALL<v8i16, "v128.">;
defm "" : SIMD_CALL<v4i32, "v128.">;
defm "" : SIMD_CALL<v2i64, "v128.">;
defm "" : SIMD_CALL<v4f32, "v128.">;
defm "" : SIMD_CALL<v2f64, "v128.">;
let IsCanonical = 1 in {
defm CALL_VOID : I<(outs), (ins function32_op:$callee, variable_ops),
(outs), (ins function32_op:$callee),
[(WebAssemblycall0 (i32 imm:$callee))],
"call \t$callee", "call\t$callee", 0x10>;
let IsCanonical = 1 in {
defm CALL_VOID : I<(outs), (ins function32_op:$callee, variable_ops),
(outs), (ins function32_op:$callee),
[(WebAssemblycall0 (i32 imm:$callee))],
"call \t$callee", "call\t$callee", 0x10>;
let isCodeGenOnly = 1 in {
defm PCALL_INDIRECT_VOID : I<(outs), (ins I32:$callee, variable_ops),
(outs), (ins I32:$callee),
[(WebAssemblycall0 I32:$callee)],
"PSEUDO CALL INDIRECT\t$callee",
"PSEUDO CALL INDIRECT\t$callee">;
} // isCodeGenOnly = 1
let isCodeGenOnly = 1 in
defm PCALL_INDIRECT_VOID : I<(outs), (ins I32:$callee, variable_ops),
(outs), (ins I32:$callee),
[(WebAssemblycall0 I32:$callee)],
"PSEUDO CALL INDIRECT\t$callee",
"PSEUDO CALL INDIRECT\t$callee">;
defm CALL_INDIRECT_VOID : I<(outs),
(ins TypeIndex:$type, i32imm:$flags,
variable_ops),
(outs), (ins TypeIndex:$type, i32imm:$flags),
[],
"call_indirect\t", "call_indirect\t$type",
0x11>;
}
defm CALL_INDIRECT_VOID : I<(outs),
(ins TypeIndex:$type, i32imm:$flags,
variable_ops),
(outs), (ins TypeIndex:$type, i32imm:$flags),
[],
"call_indirect\t", "call_indirect\t$type",
0x11>;
} // IsCanonical = 1
} // Uses = [SP32,SP64], isCall = 1
// Patterns for matching a direct call to a global address.

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@ -20,11 +20,10 @@ defm BR_IF : I<(outs), (ins bb_op:$dst, I32:$cond),
let isCodeGenOnly = 1 in
defm BR_UNLESS : I<(outs), (ins bb_op:$dst, I32:$cond),
(outs), (ins bb_op:$dst), []>;
let isBarrier = 1 in {
let isBarrier = 1 in
defm BR : NRI<(outs), (ins bb_op:$dst),
[(br bb:$dst)],
"br \t$dst", 0x0c>;
} // isBarrier = 1
} // isBranch = 1, isTerminator = 1, hasCtrlDep = 1
def : Pat<(brcond (i32 (setne I32:$cond, 0)), bb:$dst),
@ -35,14 +34,11 @@ def : Pat<(brcond (i32 (seteq I32:$cond, 0)), bb:$dst),
// A list of branch targets enclosed in {} and separated by comma.
// Used by br_table only.
def BrListAsmOperand : AsmOperandClass { let Name = "BrList"; }
let OperandNamespace = "WebAssembly" in {
let OperandType = "OPERAND_BRLIST" in {
let OperandNamespace = "WebAssembly", OperandType = "OPERAND_BRLIST" in
def brlist : Operand<i32> {
let ParserMatchClass = BrListAsmOperand;
let PrintMethod = "printBrList";
}
} // OPERAND_BRLIST
} // OperandNamespace = "WebAssembly"
// TODO: SelectionDAG's lowering insists on using a pointer as the index for
// jump tables, so in practice we don't ever use BR_TABLE_I64 in wasm32 mode
@ -82,9 +78,8 @@ defm END_BLOCK : NRI<(outs), (ins), [], "end_block", 0x0b>;
defm END_LOOP : NRI<(outs), (ins), [], "end_loop", 0x0b>;
defm END_IF : NRI<(outs), (ins), [], "end_if", 0x0b>;
// Generic instruction, for disassembler.
let IsCanonical = 1 in {
let IsCanonical = 1 in
defm END : NRI<(outs), (ins), [], "end", 0x0b>;
}
let isTerminator = 1, isBarrier = 1 in
defm END_FUNCTION : NRI<(outs), (ins), [], "end_function", 0x0b>;
} // Uses = [VALUE_STACK], Defs = [VALUE_STACK]
@ -109,7 +104,7 @@ multiclass SIMD_RETURN<ValueType vt> {
let isCodeGenOnly = 1 in
defm FALLTHROUGH_RETURN_#vt : I<(outs), (ins V128:$val), (outs), (ins),
[]>,
Requires<[HasSIMD128]>;
Requires<[HasSIMD128]>;
}
let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
@ -187,4 +182,4 @@ let isTerminator = 1, hasSideEffects = 1, isBarrier = 1, hasCtrlDep = 1,
[(catchret bb:$dst, bb:$from)], "catchret", 0>;
} // isTerminator = 1, hasSideEffects = 1, isBarrier = 1, hasCtrlDep = 1,
// isPseudo = 1, isEHScopeReturn = 1
}
} // Predicates = [HasExceptionHandling]

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@ -159,11 +159,10 @@ def event_op : Operand<i32>;
} // OperandType = "OPERAND_P2ALIGN"
let OperandType = "OPERAND_SIGNATURE" in {
let OperandType = "OPERAND_SIGNATURE" in
def Signature : Operand<i32> {
let PrintMethod = "printWebAssemblySignatureOperand";
}
} // OperandType = "OPERAND_SIGNATURE"
let OperandType = "OPERAND_TYPEINDEX" in
def TypeIndex : Operand<i32>;
@ -194,8 +193,8 @@ include "WebAssemblyInstrFormats.td"
//===----------------------------------------------------------------------===//
multiclass ARGUMENT<WebAssemblyRegClass reg, ValueType vt> {
let hasSideEffects = 1, isCodeGenOnly = 1,
Defs = []<Register>, Uses = [ARGUMENTS] in
let hasSideEffects = 1, isCodeGenOnly = 1, Defs = []<Register>,
Uses = [ARGUMENTS] in
defm ARGUMENT_#vt :
I<(outs reg:$res), (ins i32imm:$argno), (outs), (ins i32imm:$argno),
[(set (vt reg:$res), (WebAssemblyargument timm:$argno))]>;
@ -209,7 +208,7 @@ defm "": ARGUMENT<EXCEPT_REF, ExceptRef>;
// local.get and local.set are not generated by instruction selection; they
// are implied by virtual register uses and defs.
multiclass LOCAL<WebAssemblyRegClass vt> {
let hasSideEffects = 0 in {
let hasSideEffects = 0 in {
// COPY is not an actual instruction in wasm, but since we allow local.get and
// local.set to be implicit during most of codegen, we can have a COPY which
// is actually a no-op because all the work is done in the implied local.get

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@ -94,7 +94,7 @@ def : StorePatExternSymOffOnly<vec_t, store, !cast<NI>("STORE_"#vec_t)>;
// Constant: v128.const
multiclass ConstVec<ValueType vec_t, dag ops, dag pat, string args> {
let isMoveImm = 1, isReMaterializable = 1,
Predicates = [HasSIMD128, HasUnimplementedSIMD128] in
Predicates = [HasSIMD128, HasUnimplementedSIMD128] in
defm CONST_V128_#vec_t : SIMD_I<(outs V128:$dst), ops, (outs), ops,
[(set V128:$dst, (vec_t pat))],
"v128.const\t$dst, "#args,
@ -125,14 +125,13 @@ defm "" : ConstVec<v8i16,
ImmI16:$i0, ImmI16:$i1, ImmI16:$i2, ImmI16:$i3,
ImmI16:$i4, ImmI16:$i5, ImmI16:$i6, ImmI16:$i7),
"$i0, $i1, $i2, $i3, $i4, $i5, $i6, $i7">;
let IsCanonical = 1 in {
let IsCanonical = 1 in
defm "" : ConstVec<v4i32,
(ins vec_i32imm_op:$i0, vec_i32imm_op:$i1,
vec_i32imm_op:$i2, vec_i32imm_op:$i3),
(build_vector (i32 imm:$i0), (i32 imm:$i1),
(i32 imm:$i2), (i32 imm:$i3)),
"$i0, $i1, $i2, $i3">;
}
defm "" : ConstVec<v2i64,
(ins vec_i64imm_op:$i0, vec_i64imm_op:$i1),
(build_vector (i64 imm:$i0), (i64 imm:$i1)),