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[ARM] Mark LEApcrel as not having side effects 

Doing this lets us hoist it out of loops, and I've also marked it as
rematerializable the same as the thumb1 and thumb2 counterparts.

It looks like it being marked as such was just a mistake, as the commit that
made that change only mentions LEApcrelJT and in thumb1 and thumb2 only the
LEApcrelJT instructions were marked as having side-effects, so it looks like
the intent was to only mark LEApcrelJT as having side-effects but LEApcrel was
accidentally marked as such also.

Differential Revision: https://reviews.llvm.org/D32857

llvm-svn: 303053
This commit is contained in:
John Brawn 2017-05-15 11:50:21 +00:00
parent aed4b5682d
commit 43132c46a6
2 changed files with 33 additions and 2 deletions
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4
llvm/lib/Target/ARM/ARMInstrInfo.td
View File

@ -2222,14 +2222,14 @@ def ADR : AI1<{0,?,?,0}, (outs GPR:$Rd), (ins adrlabel:$label),
let Inst{11-0} = label{11-0}; let Inst{11-0} = label{11-0};
} }
let hasSideEffects = 1 in { let hasSideEffects = 0, isReMaterializable = 1 in
def LEApcrel : ARMPseudoInst<(outs GPR:$Rd), (ins i32imm:$label, pred:$p), def LEApcrel : ARMPseudoInst<(outs GPR:$Rd), (ins i32imm:$label, pred:$p),
4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>; 4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>;
let hasSideEffects = 1 in
def LEApcrelJT : ARMPseudoInst<(outs GPR:$Rd), def LEApcrelJT : ARMPseudoInst<(outs GPR:$Rd),
(ins i32imm:$label, pred:$p), (ins i32imm:$label, pred:$p),
4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>; 4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>;
}
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Control Flow Instructions. // Control Flow Instructions.

31
llvm/test/CodeGen/ARM/adr-hoist.ll Normal file
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@ -0,0 +1,31 @@
; RUN: llc -mtriple=armv7a %s -o - | FileCheck %s
; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s
; RUN: llc -mtriple=thumbv6m %s -o - | FileCheck %s
@arr = internal unnamed_addr constant [4 x i32] [i32 305419896, i32 -1430532899, i32 -2023406815, i32 -573785174], align 4
; Check that the adr of arr is hoisted out of the loop
; CHECK: adr [[REG:r[0-9]+]], .LCP
; CHECK: .LBB
; CHECK-NOT adr
; CHECK: ldr{{(.w)?}} {{r[0-9]+}}, {{\[}}[[REG]],
define void @fn(i32 %n, i32* %p) {
entry:
%cmp8 = icmp sgt i32 %n, 0
br i1 %cmp8, label %for.body, label %for.cond.cleanup
for.body:
%i.09 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
%arrayidx = getelementptr inbounds i32, i32* %p, i32 %i.09
%0 = load i32, i32* %arrayidx, align 4
%arrayidx1 = getelementptr inbounds [4 x i32], [4 x i32]* @arr, i32 0, i32 %0
%1 = load i32, i32* %arrayidx1, align 4
store i32 %1, i32* %arrayidx, align 4
%inc = add nuw nsw i32 %i.09, 1
%exitcond = icmp eq i32 %inc, %n
br i1 %exitcond, label %for.cond.cleanup, label %for.body
for.cond.cleanup:
ret void
}