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AMDGPU: Prepare for explicit absolute relocations in code generation 

Summary:
We will use absolute relocations for LDS symbols.

Change-Id: I9a32795ed0ea835e433a787129cfe3c57ee9a325

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61492

llvm-svn: 363517
This commit is contained in:
Nicolai Haehnle 2019-06-16 17:43:37 +00:00
parent 6d71be4e67
commit 41abf2766e
7 changed files with 33 additions and 9 deletions
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2
llvm/include/llvm/MC/MCExpr.h
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@ -293,6 +293,8 @@ public:
VK_AMDGPU_REL32_LO, // symbol@rel32@lo
VK_AMDGPU_REL32_HI, // symbol@rel32@hi
VK_AMDGPU_REL64, // symbol@rel64
VK_AMDGPU_ABS32_LO, // symbol@abs32@lo
VK_AMDGPU_ABS32_HI, // symbol@abs32@hi
VK_TPREL,
VK_DTPREL

4
llvm/lib/MC/MCExpr.cpp
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@ -310,6 +310,8 @@ StringRef MCSymbolRefExpr::getVariantKindName(VariantKind Kind) {
case VK_AMDGPU_REL32_LO: return "rel32@lo";
case VK_AMDGPU_REL32_HI: return "rel32@hi";
case VK_AMDGPU_REL64: return "rel64";
case VK_AMDGPU_ABS32_LO: return "abs32@lo";
case VK_AMDGPU_ABS32_HI: return "abs32@hi";
}
llvm_unreachable("Invalid variant kind");
}
@ -425,6 +427,8 @@ MCSymbolRefExpr::getVariantKindForName(StringRef Name) {
.Case("rel32@lo", VK_AMDGPU_REL32_LO)
.Case("rel32@hi", VK_AMDGPU_REL32_HI)
.Case("rel64", VK_AMDGPU_REL64)
.Case("abs32@lo", VK_AMDGPU_ABS32_LO)
.Case("abs32@hi", VK_AMDGPU_ABS32_HI)
.Default(VK_Invalid);
}

13
llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
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@ -90,6 +90,10 @@ static MCSymbolRefExpr::VariantKind getVariantKind(unsigned MOFlags) {
return MCSymbolRefExpr::VK_AMDGPU_REL32_LO;
case SIInstrInfo::MO_REL32_HI:
return MCSymbolRefExpr::VK_AMDGPU_REL32_HI;
case SIInstrInfo::MO_ABS32_LO:
return MCSymbolRefExpr::VK_AMDGPU_ABS32_LO;
case SIInstrInfo::MO_ABS32_HI:
return MCSymbolRefExpr::VK_AMDGPU_ABS32_HI;
}
}
@ -146,10 +150,13 @@ bool AMDGPUMCInstLower::lowerOperand(const MachineOperand &MO,
SmallString<128> SymbolName;
AP.getNameWithPrefix(SymbolName, GV);
MCSymbol *Sym = Ctx.getOrCreateSymbol(SymbolName);
const MCExpr *SymExpr =
const MCExpr *Expr =
MCSymbolRefExpr::create(Sym, getVariantKind(MO.getTargetFlags()),Ctx);
const MCExpr *Expr = MCBinaryExpr::createAdd(SymExpr,
MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
int64_t Offset = MO.getOffset();
if (Offset != 0) {
Expr = MCBinaryExpr::createAdd(Expr,
MCConstantExpr::create(Offset, Ctx), Ctx);
}
MCOp = MCOperand::createExpr(Expr);
return true;
}

8
llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
View File

@ -399,8 +399,12 @@ SIMCCodeEmitter::getSDWAVopcDstEncoding(const MCInst &MI, unsigned OpNo,
static bool needsPCRel(const MCExpr *Expr) {
switch (Expr->getKind()) {
case MCExpr::SymbolRef:
return true;
case MCExpr::SymbolRef: {
auto *SE = cast<MCSymbolRefExpr>(Expr);
MCSymbolRefExpr::VariantKind Kind = SE->getKind();
return Kind != MCSymbolRefExpr::VK_AMDGPU_ABS32_LO &&
Kind != MCSymbolRefExpr::VK_AMDGPU_ABS32_HI;
}
case MCExpr::Binary: {
auto *BE = cast<MCBinaryExpr>(Expr);
if (BE->getOpcode() == MCBinaryExpr::Sub)

4
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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@ -5846,7 +5846,9 @@ SIInstrInfo::getSerializableDirectMachineOperandTargetFlags() const {
{ MO_GOTPCREL32_LO, "amdgpu-gotprel32-lo" },
{ MO_GOTPCREL32_HI, "amdgpu-gotprel32-hi" },
{ MO_REL32_LO, "amdgpu-rel32-lo" },
{ MO_REL32_HI, "amdgpu-rel32-hi" }
{ MO_REL32_HI, "amdgpu-rel32-hi" },
{ MO_ABS32_LO, "amdgpu-abs32-lo" },
{ MO_ABS32_HI, "amdgpu-abs32-hi" },
};
return makeArrayRef(TargetFlags);

7
llvm/lib/Target/AMDGPU/SIInstrInfo.h
View File

@ -143,7 +143,7 @@ protected:
public:
enum TargetOperandFlags {
MO_MASK = 0x7,
MO_MASK = 0xf,
MO_NONE = 0,
// MO_GOTPCREL -> symbol@GOTPCREL -> R_AMDGPU_GOTPCREL.
@ -160,7 +160,10 @@ public:
MO_REL32_HI = 5,
MO_LONG_BRANCH_FORWARD = 6,
MO_LONG_BRANCH_BACKWARD = 7
MO_LONG_BRANCH_BACKWARD = 7,
MO_ABS32_LO = 8,
MO_ABS32_HI = 9,
};
explicit SIInstrInfo(const GCNSubtarget &ST);

4
llvm/test/CodeGen/MIR/AMDGPU/target-flags.mir
View File

@ -26,7 +26,9 @@ body: |
; CHECK: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 target-flags(amdgpu-gotprel) @foo
; CHECK: S_ENDPGM 0
%0 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @foo + 4, target-flags(amdgpu-rel32-hi) @foo + 4, implicit-def dead $scc
%1 = S_MOV_B64 target-flags(amdgpu-gotprel) @foo
%1 = S_MOV_B64 target-flags(amdgpu-gotprel) @foo
%2:sreg_32 = S_MOV_B32 target-flags(amdgpu-abs32-lo) @foo
%3:sreg_32 = S_MOV_B32 target-flags(amdgpu-abs32-hi) @foo
S_ENDPGM 0
...