Update physregsused info.

llvm-svn: 19793
This commit is contained in:
Chris Lattner 2005-01-23 22:55:45 +00:00
parent 24f0f0e28f
commit 3d527f7b61
1 changed files with 18 additions and 10 deletions

View File

@ -35,6 +35,7 @@ namespace {
MachineFunction *MF; MachineFunction *MF;
const TargetMachine *TM; const TargetMachine *TM;
const MRegisterInfo *RegInfo; const MRegisterInfo *RegInfo;
bool *PhysRegsEverUsed;
// StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
// these values are spilled // these values are spilled
@ -118,8 +119,10 @@ unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
assert(RI+regIdx != RE && "Not enough registers!"); assert(RI+regIdx != RE && "Not enough registers!");
unsigned PhysReg = *(RI+regIdx); unsigned PhysReg = *(RI+regIdx);
if (!RegsUsed[PhysReg]) if (!RegsUsed[PhysReg]) {
PhysRegsEverUsed[PhysReg] = true;
return PhysReg; return PhysReg;
}
} }
} }
@ -156,19 +159,20 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
RegsUsed.resize(RegInfo->getNumRegs()); RegsUsed.resize(RegInfo->getNumRegs());
// a preliminary pass that will invalidate any registers that // This is a preliminary pass that will invalidate any registers that are
// are used by the instruction (including implicit uses) // used by the instruction (including implicit uses).
unsigned Opcode = MI->getOpcode(); unsigned Opcode = MI->getOpcode();
const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode); const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode);
const unsigned *Regs = Desc.ImplicitUses; const unsigned *Regs;
while (*Regs) for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
RegsUsed[*Regs++] = true; RegsUsed[*Regs] = true;
Regs = Desc.ImplicitDefs; for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
while (*Regs) RegsUsed[*Regs] = true;
RegsUsed[*Regs++] = true; PhysRegsEverUsed[*Regs] = true;
}
// Loop over uses, move from memory into registers // Loop over uses, move from memory into registers.
for (int i = MI->getNumOperands() - 1; i >= 0; --i) { for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
MachineOperand &op = MI->getOperand(i); MachineOperand &op = MI->getOperand(i);
@ -225,6 +229,10 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
TM = &MF->getTarget(); TM = &MF->getTarget();
RegInfo = TM->getRegisterInfo(); RegInfo = TM->getRegisterInfo();
PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
Fn.setUsedPhysRegs(PhysRegsEverUsed);
// Loop over all of the basic blocks, eliminating virtual register references // Loop over all of the basic blocks, eliminating virtual register references
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
MBB != MBBe; ++MBB) MBB != MBBe; ++MBB)