From 3c9f336361dd24c7bb80903bbda7b1040a09486c Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Mon, 19 Dec 2011 19:28:37 +0000 Subject: [PATCH] Remove the restriction on the first operand of the add node in SelectAddr. This change reduces the number of instructions generated. For example, (load (add (sub $n0, $n1), (MipsLo got(s)))) results in the following sequence of instructions: 1. sub $n2, $n0, $n1 2. lw got(s)($n2) Previously, three instructions were needed. 1. sub $n2, $n0, $n1 2. addiu $n3, $n2, got(s) 3. lw 0($n3) llvm-svn: 146888 --- llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp | 4 +--- llvm/test/CodeGen/Mips/tls.ll | 2 +- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp b/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp index b17239d93926..4ac51e84ef00 100644 --- a/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp +++ b/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp @@ -160,9 +160,7 @@ SelectAddr(SDValue Addr, SDValue &Base, SDValue &Offset) { // Generate: // lui $2, %hi($CPI1_0) // lwc1 $f0, %lo($CPI1_0)($2) - if ((Addr.getOperand(0).getOpcode() == MipsISD::Hi || - Addr.getOperand(0).getOpcode() == ISD::LOAD) && - Addr.getOperand(1).getOpcode() == MipsISD::Lo) { + if (Addr.getOperand(1).getOpcode() == MipsISD::Lo) { SDValue LoVal = Addr.getOperand(1); if (isa(LoVal.getOperand(0)) || isa(LoVal.getOperand(0))) { diff --git a/llvm/test/CodeGen/Mips/tls.ll b/llvm/test/CodeGen/Mips/tls.ll index 3fa852b454c4..8f97793c18a9 100644 --- a/llvm/test/CodeGen/Mips/tls.ll +++ b/llvm/test/CodeGen/Mips/tls.ll @@ -55,7 +55,7 @@ entry: ; PIC: jalr $25 ; PIC: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i) ; PIC: addu $[[R1:[0-9]+]], $[[R0]], $2 -; PIC: addiu ${{[0-9]+}}, $[[R1]], %dtprel_lo(f3.i) +; PIC: lw ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]]) %0 = load i32* @f3.i, align 4 %inc = add nsw i32 %0, 1