[mips][ias] Range check uimm10 operands
Summary: Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15229 llvm-svn: 255112
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@ -3653,6 +3653,9 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
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case Match_UImm8_0:
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return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
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"expected 8-bit unsigned immediate");
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case Match_UImm10_0:
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return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
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"expected 10-bit unsigned immediate");
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}
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llvm_unreachable("Implement any new match types added!");
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@ -394,8 +394,10 @@ class ConstantUImmAsmOperandClass<int Bits, list<AsmOperandClass> Supers = [],
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let DiagnosticType = "UImm" # Bits # "_" # Offset;
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}
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def ConstantUImm10AsmOperandClass
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: ConstantUImmAsmOperandClass<10, []>;
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def ConstantUImm8AsmOperandClass
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: ConstantUImmAsmOperandClass<8, []>;
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: ConstantUImmAsmOperandClass<8, [ConstantUImm10AsmOperandClass]>;
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def ConstantUImm6AsmOperandClass
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: ConstantUImmAsmOperandClass<6, [ConstantUImm8AsmOperandClass]>;
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def ConstantUImm5Plus32AsmOperandClass
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@ -492,17 +494,6 @@ def simm32 : Operand<i32>;
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def uimm20 : Operand<i32> {
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}
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def MipsUImm10AsmOperand : AsmOperandClass {
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let Name = "UImm10";
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let RenderMethod = "addImmOperands";
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let ParserMethod = "parseImm";
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let PredicateMethod = "isUImm<10>";
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}
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def uimm10 : Operand<i32> {
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let ParserMatchClass = MipsUImm10AsmOperand;
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}
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def simm16_64 : Operand<i64> {
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let DecoderMethod = "DecodeSimm16";
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}
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@ -514,7 +505,7 @@ def uimmz : Operand<i32> {
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}
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// Unsigned Operands
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foreach I = {1, 2, 3, 4, 5, 6, 8} in
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foreach I = {1, 2, 3, 4, 5, 6, 8, 10} in
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def uimm # I : Operand<i32> {
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let PrintMethod = "printUnsignedImm";
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let ParserMatchClass =
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@ -75,11 +75,6 @@
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movep $8, $6, $2, $3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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movep $5, $6, $5, $3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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movep $5, $6, $2, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 1024, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 7, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 1024, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wait 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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prefx -1, $8($5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
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prefx 32, $8($5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
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jraddiusp 1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
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@ -1,6 +1,12 @@
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# RUN: not llvm-mc %s -triple=mips -show-encoding -mattr=micromips 2>%t1
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# RUN: FileCheck %s < %t1
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break -1 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
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break 1024 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
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break -1, 5 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
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break 1024, 5 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
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break 7, -1 # CHECK: :[[@LINE]]:12: error: expected 10-bit unsigned immediate
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break 7, 1024 # CHECK: :[[@LINE]]:12: error: expected 10-bit unsigned immediate
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break16 -1 # CHECK: :[[@LINE]]:11: error: expected 4-bit unsigned immediate
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break16 16 # CHECK: :[[@LINE]]:11: error: expected 4-bit unsigned immediate
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cache -1, 255($7) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
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@ -16,8 +16,12 @@
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bnezc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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bnezc16 $6, 31 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
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bnezc16 $6, 130 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
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break 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 1023, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break -1 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
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break 1024 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
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break -1, 5 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
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break 1024, 5 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
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break 7, -1 # CHECK: :[[@LINE]]:12: error: expected 10-bit unsigned immediate
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break 7, 1024 # CHECK: :[[@LINE]]:12: error: expected 10-bit unsigned immediate
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cache -1, 255($7) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
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cache 32, 255($7) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
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ext $2, $3, -1, 31 # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
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@ -68,6 +72,8 @@
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tlt $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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tltu $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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tne $8, $9, $2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wait -1 # CHECK: :[[@LINE]]:8: error: expected 10-bit unsigned immediate
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wait 1024 # CHECK: :[[@LINE]]:8: error: expected 10-bit unsigned immediate
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wrpgpr $34, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wrpgpr $3, $33 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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wsbh $34, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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@ -15,10 +15,12 @@ local_label:
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ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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sdc2 $20,23157($s2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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swc2 $25,24880($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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break 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 1024, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 7, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 1024, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
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break 1024 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
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break -1, 5 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
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break 1024, 5 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
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break 7, -1 # CHECK: :[[@LINE]]:18: error: expected 10-bit unsigned immediate
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break 7, 1024 # CHECK: :[[@LINE]]:18: error: expected 10-bit unsigned immediate
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// FIXME: Following tests are temporarely disabled, until "PredicateControl not in hierarchy" problem is resolved
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bltl $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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bltul $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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@ -13,10 +13,12 @@ local_label:
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jalr.hb $31 # CHECK: :[[@LINE]]:9: error: source and destination must be different
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jalr.hb $31, $31 # CHECK: :[[@LINE]]:9: error: source and destination must be different
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ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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break 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 1024, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 7, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break 1024, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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break -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
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break 1024 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
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break -1, 5 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
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break 1024, 5 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
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break 7, -1 # CHECK: :[[@LINE]]:18: error: expected 10-bit unsigned immediate
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break 7, 1024 # CHECK: :[[@LINE]]:18: error: expected 10-bit unsigned immediate
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// FIXME: Following tests are temporarely disabled, until "PredicateControl not in hierarchy" problem is resolved
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bltl $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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bltul $7, $8, local_label # -CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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