Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted.

llvm-svn: 148383
This commit is contained in:
Nadav Rotem 2012-01-18 08:33:18 +00:00
parent 79d01c1760
commit 3b8f0cc9fa
2 changed files with 18 additions and 2 deletions

View File

@ -249,8 +249,10 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
}
case TargetLowering::TypeWidenVector:
if (NOutVT.bitsEq(NInVT))
// The input is widened to the same size. Convert to the widened value.
// The input is widened to the same size. Convert to the widened value.
// Make sure that the outgoing value is not a vector, because this would
// make us bitcast between two vectors which are legalized in different ways.
if (NOutVT.bitsEq(NInVT) && !NOutVT.isVector())
return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp));
}

View File

@ -0,0 +1,14 @@
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mtriple=x86_64-pc-win32 | FileCheck %s
;CHECK: vcast
define <2 x i32> @vcast(<2 x float> %a, <2 x float> %b) {
;CHECK: pshufd
;CHECK: pshufd
%af = bitcast <2 x float> %a to <2 x i32>
%bf = bitcast <2 x float> %b to <2 x i32>
%x = sub <2 x i32> %af, %bf
;CHECK: psubq
ret <2 x i32> %x
;CHECK: ret
}