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Fix swapped CASA operands. 

Found by SingleSource/UnitTests/AtomicOps.c

llvm-svn: 200130
This commit is contained in:
Jakob Stoklund Olesen 2014-01-26 06:09:54 +00:00
parent 24ea09ef7d
commit 39f0833f47
2 changed files with 4 additions and 4 deletions
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4
llvm/lib/Target/Sparc/SparcISelLowering.cpp
View File

@ -2977,7 +2977,7 @@ SparcTargetLowering::expandAtomicRMW(MachineInstr *MI,
// loop:
// %val = phi %val0, %dest
// %upd = op %val, %rs2
// %dest = cas %addr, %upd, %val
// %dest = cas %addr, %val, %upd
// cmp %val, %dest
// bne loop
// done:
@ -3036,7 +3036,7 @@ SparcTargetLowering::expandAtomicRMW(MachineInstr *MI,
}
BuildMI(LoopMBB, DL, TII.get(is64Bit ? SP::CASXrr : SP::CASrr), DestReg)
.addReg(AddrReg).addReg(UpdReg).addReg(ValReg)
.addReg(AddrReg).addReg(ValReg).addReg(UpdReg)
.setMemRefs(MI->memoperands_begin(), MI->memoperands_end());
BuildMI(LoopMBB, DL, TII.get(SP::CMPrr)).addReg(ValReg).addReg(DestReg);
BuildMI(LoopMBB, DL, TII.get(is64Bit ? SP::BPXCC : SP::BCOND))

4
llvm/test/CodeGen/SPARC/atomics.ll
View File

@ -64,8 +64,8 @@ entry:
; CHECK-LABEL: test_load_add_32
; CHECK: membar
; CHECK: add
; CHECK: cas [%o0]
; CHECK: add [[V:%[gilo][0-7]]], %o1, [[U:%[gilo][0-7]]]
; CHECK: cas [%o0], [[V]], [[U]]
; CHECK: membar
define zeroext i32 @test_load_add_32(i32* %p, i32 zeroext %v) {
entry: