revert r340135: [CodeGen] add rotate builtins
At least a couple of bots (PPC only?) are showing the compiler dying while trying to compile: http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage/builds/11065/steps/build%20stage%201/logs/stdio http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/18267/steps/build%20stage%201/logs/stdio llvm-svn: 340136
This commit is contained in:
Sanjay Patel
parent
9116f0438c
commit
39b4dd2da7
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@ -1739,70 +1739,6 @@ The '``__builtin_bitreverse``' family of builtins is used to reverse
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the bitpattern of an integer value; for example ``0b10110110`` becomes
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``0b01101101``.
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``__builtin_rotateleft``
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------------------------
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* ``__builtin_rotateleft8``
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* ``__builtin_rotateleft16``
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* ``__builtin_rotateleft32``
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* ``__builtin_rotateleft64``
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**Syntax**:
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.. code-block:: c++
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__builtin_rotateleft32(x, y)
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**Examples**:
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.. code-block:: c++
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uint8_t rot_x = __builtin_rotateleft8(x, y);
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uint16_t rot_x = __builtin_rotateleft16(x, y);
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uint32_t rot_x = __builtin_rotateleft32(x, y);
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uint64_t rot_x = __builtin_rotateleft64(x, y);
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**Description**:
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The '``__builtin_rotateleft``' family of builtins is used to rotate
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the bits in the first argument by the amount in the second argument.
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For example, ``0b10000110`` rotated left by 11 becomes ``0b00110100``.
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The shift value is treated as an unsigned amount modulo the size of
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the arguments. Both arguments and the result have the bitwidth specified
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by the name of the builtin.
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``__builtin_rotateright``
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------------------------
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* ``__builtin_rotateright8``
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* ``__builtin_rotateright16``
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* ``__builtin_rotateright32``
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* ``__builtin_rotateright64``
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**Syntax**:
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.. code-block:: c++
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__builtin_rotateright32(x, y)
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**Examples**:
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.. code-block:: c++
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uint8_t rot_x = __builtin_rotateright8(x, y);
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uint16_t rot_x = __builtin_rotateright16(x, y);
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uint32_t rot_x = __builtin_rotateright32(x, y);
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uint64_t rot_x = __builtin_rotateright64(x, y);
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**Description**:
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The '``__builtin_rotateright``' family of builtins is used to rotate
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the bits in the first argument by the amount in the second argument.
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For example, ``0b10000110`` rotated right by 3 becomes ``0b11010000``.
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The shift value is treated as an unsigned amount modulo the size of
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the arguments. Both arguments and the result have the bitwidth specified
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by the name of the builtin.
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``__builtin_unreachable``
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-------------------------
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@ -428,15 +428,6 @@ BUILTIN(__builtin_bitreverse16, "UsUs", "nc")
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BUILTIN(__builtin_bitreverse32, "UiUi", "nc")
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BUILTIN(__builtin_bitreverse64, "ULLiULLi", "nc")
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BUILTIN(__builtin_rotateleft8, "UcUcUc", "nc")
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BUILTIN(__builtin_rotateleft16, "UsUsUs", "nc")
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BUILTIN(__builtin_rotateleft32, "UiUiUi", "nc")
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BUILTIN(__builtin_rotateleft64, "ULLiULLiULLi", "nc")
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BUILTIN(__builtin_rotateright8, "UcUcUc", "nc")
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BUILTIN(__builtin_rotateright16, "UsUsUs", "nc")
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BUILTIN(__builtin_rotateright32, "UiUiUi", "nc")
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BUILTIN(__builtin_rotateright64, "ULLiULLiULLi", "nc")
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// Random GCC builtins
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BUILTIN(__builtin_constant_p, "i.", "nctu")
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BUILTIN(__builtin_classify_type, "i.", "nctu")
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@ -1647,6 +1647,46 @@ RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD,
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"cast");
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return RValue::get(Result);
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}
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case Builtin::BI_rotr8:
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case Builtin::BI_rotr16:
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case Builtin::BI_rotr:
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case Builtin::BI_lrotr:
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case Builtin::BI_rotr64: {
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Value *Val = EmitScalarExpr(E->getArg(0));
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Value *Shift = EmitScalarExpr(E->getArg(1));
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llvm::Type *ArgType = Val->getType();
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Shift = Builder.CreateIntCast(Shift, ArgType, false);
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unsigned ArgWidth = ArgType->getIntegerBitWidth();
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Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1);
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Value *RightShiftAmt = Builder.CreateAnd(Shift, Mask);
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Value *RightShifted = Builder.CreateLShr(Val, RightShiftAmt);
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Value *LeftShiftAmt = Builder.CreateAnd(Builder.CreateNeg(Shift), Mask);
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Value *LeftShifted = Builder.CreateShl(Val, LeftShiftAmt);
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Value *Result = Builder.CreateOr(LeftShifted, RightShifted);
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return RValue::get(Result);
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}
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case Builtin::BI_rotl8:
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case Builtin::BI_rotl16:
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case Builtin::BI_rotl:
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case Builtin::BI_lrotl:
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case Builtin::BI_rotl64: {
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Value *Val = EmitScalarExpr(E->getArg(0));
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Value *Shift = EmitScalarExpr(E->getArg(1));
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llvm::Type *ArgType = Val->getType();
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Shift = Builder.CreateIntCast(Shift, ArgType, false);
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unsigned ArgWidth = ArgType->getIntegerBitWidth();
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Value *Mask = llvm::ConstantInt::get(ArgType, ArgWidth - 1);
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Value *LeftShiftAmt = Builder.CreateAnd(Shift, Mask);
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Value *LeftShifted = Builder.CreateShl(Val, LeftShiftAmt);
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Value *RightShiftAmt = Builder.CreateAnd(Builder.CreateNeg(Shift), Mask);
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Value *RightShifted = Builder.CreateLShr(Val, RightShiftAmt);
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Value *Result = Builder.CreateOr(LeftShifted, RightShifted);
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return RValue::get(Result);
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}
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case Builtin::BI__builtin_unpredictable: {
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// Always return the argument of __builtin_unpredictable. LLVM does not
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// handle this builtin. Metadata for this builtin should be added directly
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@ -1701,43 +1741,6 @@ RValue CodeGenFunction::EmitBuiltinExpr(const FunctionDecl *FD,
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case Builtin::BI__builtin_bitreverse64: {
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return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bitreverse));
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}
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case Builtin::BI__builtin_rotateleft8:
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case Builtin::BI__builtin_rotateleft16:
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case Builtin::BI__builtin_rotateleft32:
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case Builtin::BI__builtin_rotateleft64:
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case Builtin::BI_rotl8: // Microsoft variants of rotate left
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case Builtin::BI_rotl16:
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case Builtin::BI_rotl:
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case Builtin::BI_lrotl:
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case Builtin::BI_rotl64: {
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llvm::Value *Src = EmitScalarExpr(E->getArg(0));
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llvm::Value *ShiftAmt = EmitScalarExpr(E->getArg(1));
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// The builtin's shift arg may have a different type than the source arg and
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// result, but the LLVM intrinsic uses the same type for all values.
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llvm::Type *Ty = Src->getType();
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ShiftAmt = Builder.CreateIntCast(ShiftAmt, Ty, false);
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Value *F = CGM.getIntrinsic(Intrinsic::fshl, Ty);
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return RValue::get(Builder.CreateCall(F, { Src, Src, ShiftAmt }));
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}
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case Builtin::BI__builtin_rotateright8:
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case Builtin::BI__builtin_rotateright16:
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case Builtin::BI__builtin_rotateright32:
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case Builtin::BI__builtin_rotateright64:
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case Builtin::BI_rotr8: // Microsoft variants of rotate right
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case Builtin::BI_rotr16:
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case Builtin::BI_rotr:
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case Builtin::BI_lrotr:
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case Builtin::BI_rotr64: {
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llvm::Value *Src = EmitScalarExpr(E->getArg(0));
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llvm::Value *ShiftAmt = EmitScalarExpr(E->getArg(1));
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// The builtin's shift arg may have a different type than the source arg and
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// result, but the LLVM intrinsic uses the same type for all values.
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llvm::Type *Ty = Src->getType();
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ShiftAmt = Builder.CreateIntCast(ShiftAmt, Ty, false);
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Value *F = CGM.getIntrinsic(Intrinsic::fshr, Ty);
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return RValue::get(Builder.CreateCall(F, { Src, Src, ShiftAmt }));
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}
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case Builtin::BI__builtin_object_size: {
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unsigned Type =
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E->getArg(1)->EvaluateKnownConstInt(getContext()).getZExtValue();
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@ -1,66 +0,0 @@
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// RUN: %clang_cc1 %s -emit-llvm -o - | FileCheck %s
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unsigned char rotl8(unsigned char x, unsigned char y) {
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// CHECK-LABEL: rotl8
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// CHECK: [[F:%.*]] = call i8 @llvm.fshl.i8(i8 [[X:%.*]], i8 [[X]], i8 [[Y:%.*]])
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// CHECK-NEXT: ret i8 [[F]]
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return __builtin_rotateleft8(x, y);
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}
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short rotl16(short x, short y) {
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// CHECK-LABEL: rotl16
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// CHECK: [[F:%.*]] = call i16 @llvm.fshl.i16(i16 [[X:%.*]], i16 [[X]], i16 [[Y:%.*]])
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// CHECK-NEXT: ret i16 [[F]]
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return __builtin_rotateleft16(x, y);
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}
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int rotl32(int x, unsigned int y) {
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// CHECK-LABEL: rotl32
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// CHECK: [[F:%.*]] = call i32 @llvm.fshl.i32(i32 [[X:%.*]], i32 [[X]], i32 [[Y:%.*]])
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// CHECK-NEXT: ret i32 [[F]]
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return __builtin_rotateleft32(x, y);
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}
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unsigned long long rotl64(unsigned long long x, long long y) {
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// CHECK-LABEL: rotl64
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// CHECK: [[F:%.*]] = call i64 @llvm.fshl.i64(i64 [[X:%.*]], i64 [[X]], i64 [[Y:%.*]])
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// CHECK-NEXT: ret i64 [[F]]
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return __builtin_rotateleft64(x, y);
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}
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char rotr8(char x, char y) {
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// CHECK-LABEL: rotr8
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// CHECK: [[F:%.*]] = call i8 @llvm.fshr.i8(i8 [[X:%.*]], i8 [[X]], i8 [[Y:%.*]])
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// CHECK-NEXT: ret i8 [[F]]
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return __builtin_rotateright8(x, y);
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}
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unsigned short rotr16(unsigned short x, unsigned short y) {
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// CHECK-LABEL: rotr16
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// CHECK: [[F:%.*]] = call i16 @llvm.fshr.i16(i16 [[X:%.*]], i16 [[X]], i16 [[Y:%.*]])
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// CHECK-NEXT: ret i16 [[F]]
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return __builtin_rotateright16(x, y);
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}
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unsigned int rotr32(unsigned int x, int y) {
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// CHECK-LABEL: rotr32
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// CHECK: [[F:%.*]] = call i32 @llvm.fshr.i32(i32 [[X:%.*]], i32 [[X]], i32 [[Y:%.*]])
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// CHECK-NEXT: ret i32 [[F]]
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return __builtin_rotateright32(x, y);
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}
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long long rotr64(long long x, unsigned long long y) {
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// CHECK-LABEL: rotr64
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// CHECK: [[F:%.*]] = call i64 @llvm.fshr.i64(i64 [[X:%.*]], i64 [[X]], i64 [[Y:%.*]])
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// CHECK-NEXT: ret i64 [[F]]
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return __builtin_rotateright64(x, y);
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}
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@ -30,36 +30,66 @@ unsigned char test_rotl8(unsigned char value, unsigned char shift) {
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return _rotl8(value, shift);
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}
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// CHECK: i8 @test_rotl8
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// CHECK: [[R:%.*]] = call i8 @llvm.fshl.i8(i8 [[X:%.*]], i8 [[X]], i8 [[Y:%.*]])
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// CHECK: ret i8 [[R]]
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// CHECK: [[LSHIFT:%[0-9]+]] = and i8 [[SHIFT:%[0-9]+]], 7
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// CHECK: [[HIGH:%[0-9]+]] = shl i8 [[VALUE:%[0-9]+]], [[LSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i8 0, [[SHIFT]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i8 [[NEGATE]], 7
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// CHECK: [[LOW:%[0-9]+]] = lshr i8 [[VALUE]], [[RSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i8 [[HIGH]], [[LOW]]
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// CHECK: ret i8 [[RESULT]]
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// CHECK }
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unsigned short test_rotl16(unsigned short value, unsigned char shift) {
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return _rotl16(value, shift);
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}
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// CHECK: i16 @test_rotl16
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// CHECK: [[R:%.*]] = call i16 @llvm.fshl.i16(i16 [[X:%.*]], i16 [[X]], i16 [[Y:%.*]])
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// CHECK: ret i16 [[R]]
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// CHECK: [[LSHIFT:%[0-9]+]] = and i16 [[SHIFT:%[0-9]+]], 15
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// CHECK: [[HIGH:%[0-9]+]] = shl i16 [[VALUE:%[0-9]+]], [[LSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i16 0, [[SHIFT]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i16 [[NEGATE]], 15
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// CHECK: [[LOW:%[0-9]+]] = lshr i16 [[VALUE]], [[RSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i16 [[HIGH]], [[LOW]]
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// CHECK: ret i16 [[RESULT]]
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// CHECK }
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unsigned int test_rotl(unsigned int value, int shift) {
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return _rotl(value, shift);
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}
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// CHECK: i32 @test_rotl
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// CHECK: [[R:%.*]] = call i32 @llvm.fshl.i32(i32 [[X:%.*]], i32 [[X]], i32 [[Y:%.*]])
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// CHECK: ret i32 [[R]]
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// CHECK: [[LSHIFT:%[0-9]+]] = and i32 [[SHIFT:%[0-9]+]], 31
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// CHECK: [[HIGH:%[0-9]+]] = shl i32 [[VALUE:%[0-9]+]], [[LSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i32 0, [[SHIFT]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i32 [[NEGATE]], 31
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// CHECK: [[LOW:%[0-9]+]] = lshr i32 [[VALUE]], [[RSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i32 [[HIGH]], [[LOW]]
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// CHECK: ret i32 [[RESULT]]
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// CHECK }
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unsigned LONG test_lrotl(unsigned LONG value, int shift) {
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return _lrotl(value, shift);
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}
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// CHECK-32BIT-LONG: i32 @test_lrotl
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// CHECK-32BIT-LONG: [[R:%.*]] = call i32 @llvm.fshl.i32(i32 [[X:%.*]], i32 [[X]], i32 [[Y:%.*]])
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// CHECK-32BIT-LONG: ret i32 [[R]]
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// CHECK-32BIT-LONG: [[LSHIFT:%[0-9]+]] = and i32 [[SHIFT:%[0-9]+]], 31
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// CHECK-32BIT-LONG: [[HIGH:%[0-9]+]] = shl i32 [[VALUE:%[0-9]+]], [[LSHIFT]]
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// CHECK-32BIT-LONG: [[NEGATE:%[0-9]+]] = sub i32 0, [[SHIFT]]
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// CHECK-32BIT-LONG: [[RSHIFT:%[0-9]+]] = and i32 [[NEGATE]], 31
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// CHECK-32BIT-LONG: [[LOW:%[0-9]+]] = lshr i32 [[VALUE]], [[RSHIFT]]
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// CHECK-32BIT-LONG: [[RESULT:%[0-9]+]] = or i32 [[HIGH]], [[LOW]]
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// CHECK-32BIT-LONG: ret i32 [[RESULT]]
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// CHECK-32BIT-LONG }
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unsigned __int64 test_rotl64(unsigned __int64 value, int shift) {
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return _rotl64(value, shift);
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}
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// CHECK: i64 @test_rotl64
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// CHECK: [[R:%.*]] = call i64 @llvm.fshl.i64(i64 [[X:%.*]], i64 [[X]], i64 [[Y:%.*]])
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// CHECK: ret i64 [[R]]
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// CHECK: [[LSHIFT:%[0-9]+]] = and i64 [[SHIFT:%[0-9]+]], 63
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// CHECK: [[HIGH:%[0-9]+]] = shl i64 [[VALUE:%[0-9]+]], [[LSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i64 0, [[SHIFT]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i64 [[NEGATE]], 63
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// CHECK: [[LOW:%[0-9]+]] = lshr i64 [[VALUE]], [[RSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i64 [[HIGH]], [[LOW]]
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// CHECK: ret i64 [[RESULT]]
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// CHECK }
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// rotate right
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@ -67,34 +97,61 @@ unsigned char test_rotr8(unsigned char value, unsigned char shift) {
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return _rotr8(value, shift);
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}
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// CHECK: i8 @test_rotr8
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// CHECK: [[R:%.*]] = call i8 @llvm.fshr.i8(i8 [[X:%.*]], i8 [[X]], i8 [[Y:%.*]])
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// CHECK: ret i8 [[R]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i8 [[SHIFT:%[0-9]+]], 7
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// CHECK: [[LOW:%[0-9]+]] = lshr i8 [[VALUE:%[0-9]+]], [[RSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i8 0, [[SHIFT]]
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// CHECK: [[LSHIFT:%[0-9]+]] = and i8 [[NEGATE]], 7
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// CHECK: [[HIGH:%[0-9]+]] = shl i8 [[VALUE]], [[LSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i8 [[HIGH]], [[LOW]]
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// CHECK }
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unsigned short test_rotr16(unsigned short value, unsigned char shift) {
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return _rotr16(value, shift);
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}
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// CHECK: i16 @test_rotr16
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// CHECK: [[R:%.*]] = call i16 @llvm.fshr.i16(i16 [[X:%.*]], i16 [[X]], i16 [[Y:%.*]])
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// CHECK: ret i16 [[R]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i16 [[SHIFT:%[0-9]+]], 15
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// CHECK: [[LOW:%[0-9]+]] = lshr i16 [[VALUE:%[0-9]+]], [[RSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i16 0, [[SHIFT]]
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// CHECK: [[LSHIFT:%[0-9]+]] = and i16 [[NEGATE]], 15
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// CHECK: [[HIGH:%[0-9]+]] = shl i16 [[VALUE]], [[LSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i16 [[HIGH]], [[LOW]]
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// CHECK }
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unsigned int test_rotr(unsigned int value, int shift) {
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return _rotr(value, shift);
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}
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// CHECK: i32 @test_rotr
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// CHECK: [[R:%.*]] = call i32 @llvm.fshr.i32(i32 [[X:%.*]], i32 [[X]], i32 [[Y:%.*]])
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// CHECK: ret i32 [[R]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i32 [[SHIFT:%[0-9]+]], 31
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// CHECK: [[LOW:%[0-9]+]] = lshr i32 [[VALUE:%[0-9]+]], [[RSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i32 0, [[SHIFT]]
|
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// CHECK: [[LSHIFT:%[0-9]+]] = and i32 [[NEGATE]], 31
|
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// CHECK: [[HIGH:%[0-9]+]] = shl i32 [[VALUE]], [[LSHIFT]]
|
||||
// CHECK: [[RESULT:%[0-9]+]] = or i32 [[HIGH]], [[LOW]]
|
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// CHECK: ret i32 [[RESULT]]
|
||||
// CHECK }
|
||||
|
||||
unsigned LONG test_lrotr(unsigned LONG value, int shift) {
|
||||
return _lrotr(value, shift);
|
||||
}
|
||||
// CHECK-32BIT-LONG: i32 @test_lrotr
|
||||
// CHECK-32BIT-LONG: [[R:%.*]] = call i32 @llvm.fshr.i32(i32 [[X:%.*]], i32 [[X]], i32 [[Y:%.*]])
|
||||
// CHECK-32BIT-LONG: ret i32 [[R]]
|
||||
// CHECK-32BIT-LONG: [[RSHIFT:%[0-9]+]] = and i32 [[SHIFT:%[0-9]+]], 31
|
||||
// CHECK-32BIT-LONG: [[LOW:%[0-9]+]] = lshr i32 [[VALUE:%[0-9]+]], [[RSHIFT]]
|
||||
// CHECK-32BIT-LONG: [[NEGATE:%[0-9]+]] = sub i32 0, [[SHIFT]]
|
||||
// CHECK-32BIT-LONG: [[LSHIFT:%[0-9]+]] = and i32 [[NEGATE]], 31
|
||||
// CHECK-32BIT-LONG: [[HIGH:%[0-9]+]] = shl i32 [[VALUE]], [[LSHIFT]]
|
||||
// CHECK-32BIT-LONG: [[RESULT:%[0-9]+]] = or i32 [[HIGH]], [[LOW]]
|
||||
// CHECK-32BIT-LONG: ret i32 [[RESULT]]
|
||||
// CHECK-32BIT-LONG }
|
||||
|
||||
unsigned __int64 test_rotr64(unsigned __int64 value, int shift) {
|
||||
return _rotr64(value, shift);
|
||||
}
|
||||
// CHECK: i64 @test_rotr64
|
||||
// CHECK: [[R:%.*]] = call i64 @llvm.fshr.i64(i64 [[X:%.*]], i64 [[X]], i64 [[Y:%.*]])
|
||||
// CHECK: ret i64 [[R]]
|
||||
|
||||
// CHECK: [[RSHIFT:%[0-9]+]] = and i64 [[SHIFT:%[0-9]+]], 63
|
||||
// CHECK: [[LOW:%[0-9]+]] = lshr i64 [[VALUE:%[0-9]+]], [[RSHIFT]]
|
||||
// CHECK: [[NEGATE:%[0-9]+]] = sub i64 0, [[SHIFT]]
|
||||
// CHECK: [[LSHIFT:%[0-9]+]] = and i64 [[NEGATE]], 63
|
||||
// CHECK: [[HIGH:%[0-9]+]] = shl i64 [[VALUE]], [[LSHIFT]]
|
||||
// CHECK: [[RESULT:%[0-9]+]] = or i64 [[HIGH]], [[LOW]]
|
||||
// CHECK: ret i64 [[RESULT]]
|
||||
// CHECK }
|
||||
|
|
|
|||
Loading…
Reference in New Issue