llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll: Tweak not to be affected by x64 Calling Convention.

llvm-svn: 236710
This commit is contained in:
NAKAMURA Takumi 2015-05-07 10:18:28 +00:00
parent 6fc75e8e1b
commit 386c22c0ff
1 changed files with 6 additions and 4 deletions

View File

@ -4,12 +4,14 @@
; Check that llc can overide function attributes target-cpu and target-features ; Check that llc can overide function attributes target-cpu and target-features
; using command line options -mcpu and -mattr. ; using command line options -mcpu and -mattr.
; CHECK: vpsadbw %ymm{{[0-9]+}}, %ymm{{[0-9]+}}, %ymm{{[0-9]+}} ; CHECK: vpsadbw (%r{{si|dx}}), %ymm{{[0-9]+}}, %ymm{{[0-9]+}}
define <4 x i64> @foo1(<4 x i64> %s1, <4 x i64> %s2) #0 { define <4 x i64> @foo1(<4 x i64>* %s1, <4 x i64>* %s2) #0 {
entry: entry:
%0 = bitcast <4 x i64> %s1 to <32 x i8> %ps1 = load <4 x i64>, <4 x i64>* %s1
%1 = bitcast <4 x i64> %s2 to <32 x i8> %ps2 = load <4 x i64>, <4 x i64>* %s2
%0 = bitcast <4 x i64> %ps1 to <32 x i8>
%1 = bitcast <4 x i64> %ps2 to <32 x i8>
%2 = tail call <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8> %0, <32 x i8> %1) %2 = tail call <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8> %0, <32 x i8> %1)
ret <4 x i64> %2 ret <4 x i64> %2
} }