From 386c22c0ffe9611893851f9230dc9b64715cfa9e Mon Sep 17 00:00:00 2001 From: NAKAMURA Takumi Date: Thu, 7 May 2015 10:18:28 +0000 Subject: [PATCH] llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll: Tweak not to be affected by x64 Calling Convention. llvm-svn: 236710 --- llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll b/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll index 52563bdba5b1..19a5ed591867 100644 --- a/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll +++ b/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll @@ -4,12 +4,14 @@ ; Check that llc can overide function attributes target-cpu and target-features ; using command line options -mcpu and -mattr. -; CHECK: vpsadbw %ymm{{[0-9]+}}, %ymm{{[0-9]+}}, %ymm{{[0-9]+}} +; CHECK: vpsadbw (%r{{si|dx}}), %ymm{{[0-9]+}}, %ymm{{[0-9]+}} -define <4 x i64> @foo1(<4 x i64> %s1, <4 x i64> %s2) #0 { +define <4 x i64> @foo1(<4 x i64>* %s1, <4 x i64>* %s2) #0 { entry: - %0 = bitcast <4 x i64> %s1 to <32 x i8> - %1 = bitcast <4 x i64> %s2 to <32 x i8> + %ps1 = load <4 x i64>, <4 x i64>* %s1 + %ps2 = load <4 x i64>, <4 x i64>* %s2 + %0 = bitcast <4 x i64> %ps1 to <32 x i8> + %1 = bitcast <4 x i64> %ps2 to <32 x i8> %2 = tail call <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8> %0, <32 x i8> %1) ret <4 x i64> %2 }