[DAGCombiner] Don't allow addcarry if the carry producer is illegal.

getAsCarry() checks that the input argument is a carry-producing node before
allowing a transformation to addcarry. This patch adds a check to make sure
that the carry-producing node is legal. If it is not, it may not remain in a
form that is manageable by the target backend. The test case caused a
compilation failure during instruction selection for this reason on SystemZ.

Patch by Ulrich Weigand.

Review: Sanjay Patel
https://reviews.llvm.org/D59822

llvm-svn: 357052
This commit is contained in:
Jonas Paulsson 2019-03-27 08:41:46 +00:00
parent 95db95729c
commit 38342a5185
2 changed files with 39 additions and 0 deletions

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@ -2336,6 +2336,10 @@ static SDValue getAsCarry(const TargetLowering &TLI, SDValue V) {
V.getOpcode() != ISD::UADDO && V.getOpcode() != ISD::USUBO)
return SDValue();
EVT VT = V.getNode()->getValueType(0);
if (!TLI.isOperationLegalOrCustom(V.getOpcode(), VT))
return SDValue();
// If the result is masked, then no matter what kind of bool it is we can
// return. If it isn't, then we need to make sure the bool type is either 0 or
// 1 and not other values.

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@ -0,0 +1,35 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
;
; Test that DAGCombiner does not produce an addcarry node if the carry
; producer is not legal. This can happen e.g. with an uaddo with a type
; that is not legal.
;
; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck %s
define void @fun(i16 %arg0, i16* %src, i32* %dst) {
; CHECK-LABEL: fun:
; CHECK: # %bb.0: # %bb
; CHECK-NEXT: llhr %r0, %r2
; CHECK-NEXT: llh %r2, 0(%r3)
; CHECK-NEXT: chi %r0, 9616
; CHECK-NEXT: lhi %r1, 0
; CHECK-NEXT: lochil %r1, 1
; CHECK-NEXT: afi %r2, 65535
; CHECK-NEXT: llhr %r3, %r2
; CHECK-NEXT: lhi %r0, 0
; CHECK-NEXT: cr %r3, %r2
; CHECK-NEXT: lochilh %r0, 1
; CHECK-NEXT: ar %r0, %r1
; CHECK-NEXT: st %r0, 0(%r4)
; CHECK-NEXT: br %r14
bb:
%tmp = icmp ult i16 %arg0, 9616
%tmp1 = zext i1 %tmp to i32
%tmp2 = load i16, i16* %src
%tmp3 = add i16 %tmp2, -1
%tmp4 = icmp ne i16 %tmp2, 0
%tmp5 = zext i1 %tmp4 to i32
%tmp6 = add nuw nsw i32 %tmp5, %tmp1
store i32 %tmp6, i32* %dst
ret void
}