reapply r334209 with fixes for harfbuzz in Chromium
r334209 description: [LSR] Check yet more intrinsic pointer operands the patch fixes another assertion in isLegalUse() Differential Revision: https://reviews.llvm.org/D47794 llvm-svn: 334300
This commit is contained in:
Daniil Fukalov
parent
f87321a2dc
commit
37433dc2e1
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@ -822,7 +822,7 @@ static bool isAddressUse(const TargetTransformInfo &TTI,
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/// Return the type of the memory being accessed.
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static MemAccessTy getAccessType(const TargetTransformInfo &TTI,
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Instruction *Inst) {
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Instruction *Inst, Value *OperandVal) {
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MemAccessTy AccessTy(Inst->getType(), MemAccessTy::UnknownAddressSpace);
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if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
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AccessTy.MemTy = SI->getOperand(0)->getType();
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@ -836,7 +836,14 @@ static MemAccessTy getAccessType(const TargetTransformInfo &TTI,
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} else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
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switch (II->getIntrinsicID()) {
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case Intrinsic::prefetch:
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case Intrinsic::memset:
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AccessTy.AddrSpace = II->getArgOperand(0)->getType()->getPointerAddressSpace();
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AccessTy.MemTy = OperandVal->getType();
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break;
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case Intrinsic::memmove:
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case Intrinsic::memcpy:
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AccessTy.AddrSpace = OperandVal->getType()->getPointerAddressSpace();
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AccessTy.MemTy = OperandVal->getType();
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break;
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default: {
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MemIntrinsicInfo IntrInfo;
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@ -2408,19 +2415,22 @@ LSRInstance::OptimizeLoopTermCond() {
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C->getValue().isMinSignedValue())
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goto decline_post_inc;
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// Check for possible scaled-address reuse.
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MemAccessTy AccessTy = getAccessType(TTI, UI->getUser());
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int64_t Scale = C->getSExtValue();
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if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
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/*BaseOffset=*/0,
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/*HasBaseReg=*/false, Scale,
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AccessTy.AddrSpace))
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goto decline_post_inc;
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Scale = -Scale;
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if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
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/*BaseOffset=*/0,
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/*HasBaseReg=*/false, Scale,
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AccessTy.AddrSpace))
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goto decline_post_inc;
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if (isAddressUse(TTI, UI->getUser(), UI->getOperandValToReplace())) {
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MemAccessTy AccessTy = getAccessType(
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TTI, UI->getUser(), UI->getOperandValToReplace());
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int64_t Scale = C->getSExtValue();
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if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
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/*BaseOffset=*/0,
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/*HasBaseReg=*/false, Scale,
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AccessTy.AddrSpace))
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goto decline_post_inc;
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Scale = -Scale;
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if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
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/*BaseOffset=*/0,
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/*HasBaseReg=*/false, Scale,
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AccessTy.AddrSpace))
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goto decline_post_inc;
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}
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}
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}
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@ -3082,7 +3092,7 @@ static bool canFoldIVIncExpr(const SCEV *IncExpr, Instruction *UserInst,
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if (IncConst->getAPInt().getMinSignedBits() > 64)
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return false;
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MemAccessTy AccessTy = getAccessType(TTI, UserInst);
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MemAccessTy AccessTy = getAccessType(TTI, UserInst, Operand);
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int64_t IncOffset = IncConst->getValue()->getSExtValue();
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if (!isAlwaysFoldable(TTI, LSRUse::Address, AccessTy, /*BaseGV=*/nullptr,
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IncOffset, /*HaseBaseReg=*/false))
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@ -3210,7 +3220,7 @@ void LSRInstance::CollectFixupsAndInitialFormulae() {
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MemAccessTy AccessTy;
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if (isAddressUse(TTI, UserInst, U.getOperandValToReplace())) {
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Kind = LSRUse::Address;
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AccessTy = getAccessType(TTI, UserInst);
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AccessTy = getAccessType(TTI, UserInst, U.getOperandValToReplace());
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}
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const SCEV *S = IU.getExpr(U);
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@ -10,7 +10,7 @@ target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:
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; CHECK-LABEL: @lsr_crash_preserve_addrspace_unknown_type(
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; CHECK: %tmp4 = bitcast %0 addrspace(3)* %tmp to double addrspace(3)*
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; CHECK: %scevgep5 = getelementptr double, double addrspace(3)* %tmp4, i32 1
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; CHEC: load double, double addrspace(3)* %scevgep5
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; CHECK: load double, double addrspace(3)* %scevgep5
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; CHECK: %scevgep = getelementptr i32, i32 addrspace(3)* %tmp1, i32 4
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; CHECK:%tmp14 = load i32, i32 addrspace(3)* %scevgep
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@ -50,5 +50,46 @@ bb17: ; preds = %bb12, %bb8
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br label %bb1
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}
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; CHECK-LABEL: @lsr_crash_preserve_addrspace_unknown_type2(
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; CHECK: %scevgep3 = getelementptr i8, i8 addrspace(5)* %array, i32 %j
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; CHECK: %scevgep2 = getelementptr i8, i8 addrspace(5)* %array, i32 %j
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; CHECK: %n8 = load i8, i8 addrspace(5)* %scevgep2, align 4
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; CHECK: call void @llvm.memcpy.p5i8.p3i8.i64(i8 addrspace(5)* %scevgep3, i8 addrspace(3)* %scevgep4, i64 42, i1 false)
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; CHECK: call void @llvm.memmove.p5i8.p3i8.i64(i8 addrspace(5)* %scevgep3, i8 addrspace(3)* %scevgep4, i64 42, i1 false)
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; CHECK: call void @llvm.memset.p5i8.i64(i8 addrspace(5)* %scevgep3, i8 42, i64 42, i1 false)
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define void @lsr_crash_preserve_addrspace_unknown_type2(i8 addrspace(5)* %array, i8 addrspace(3)* %array2) {
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.inc
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%j = phi i32 [ %add, %for.inc ], [ 0, %entry ]
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%idx = getelementptr inbounds i8, i8 addrspace(5)* %array, i32 %j
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%idx1 = getelementptr inbounds i8, i8 addrspace(3)* %array2, i32 %j
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%t = getelementptr inbounds i8, i8 addrspace(5)* %array, i32 %j
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%n8 = load i8, i8 addrspace(5)* %t, align 4
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%n7 = getelementptr inbounds i8, i8 addrspace(5)* %t, i32 42
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%n9 = load i8, i8 addrspace(5)* %n7, align 4
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%cmp = icmp sgt i32 %j, 42
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%add = add nuw nsw i32 %j, 1
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br i1 %cmp, label %if.then17, label %for.inc
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if.then17: ; preds = %for.body
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call void @llvm.memcpy.p5i8.p5i8.i64(i8 addrspace(5)* %idx, i8 addrspace(3)* %idx1, i64 42, i1 false)
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call void @llvm.memmove.p5i8.p5i8.i64(i8 addrspace(5)* %idx, i8 addrspace(3)* %idx1, i64 42, i1 false)
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call void @llvm.memset.p5i8.i64(i8 addrspace(5)* %idx, i8 42, i64 42, i1 false)
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br label %for.inc
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for.inc: ; preds = %for.body, %if.then17
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%exitcond = icmp eq i1 %cmp, 1
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br i1 %exitcond, label %end, label %for.body
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end: ; preds = %for.inc
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ret void
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}
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declare void @llvm.memcpy.p5i8.p5i8.i64(i8 addrspace(5)*, i8 addrspace(3)*, i64, i1)
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declare void @llvm.memmove.p5i8.p5i8.i64(i8 addrspace(5)*, i8 addrspace(3)*, i64, i1)
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declare void @llvm.memset.p5i8.i64(i8 addrspace(5)*, i8, i64, i1)
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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