[InstCombine][InstSimplify] Add various tests for ctlz/cttz with vectors, some showing missed optimizations. NFC
llvm-svn: 304667
This commit is contained in:
Craig Topper
parent
622c0f89ec
commit
36fa2f0dee
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@ -21,6 +21,7 @@ declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1) nounwind readnone
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declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone
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declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) nounwind readnone
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declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
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declare <2 x i8> @llvm.ctlz.v2i8(<2 x i8>, i1) nounwind readnone
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declare double @llvm.cos.f64(double %Val) nounwind readonly
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declare double @llvm.sin.f64(double %Val) nounwind readonly
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declare double @llvm.floor.f64(double %Val) nounwind readonly
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@ -282,6 +283,19 @@ define i32 @cttz(i32 %a) {
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ret i32 %count
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}
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define <2 x i32> @cttz_vec(<2 x i32> %a) {
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; CHECK-LABEL: @cttz_vec(
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], <i32 8, i32 8>
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[OR]], <i32 -8, i32 -8>
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; CHECK-NEXT: [[COUNT:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[AND]], i1 true)
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; CHECK-NEXT: ret <2 x i32> [[COUNT]]
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;
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%or = or <2 x i32> %a, <i32 8, i32 8>
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%and = and <2 x i32> %or, <i32 -8, i32 -8>
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%count = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %and, i1 true) nounwind readnone
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ret <2 x i32> %count
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}
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define i1 @cttz_knownbits(i32 %arg) {
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; CHECK-LABEL: @cttz_knownbits(
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; CHECK-NEXT: ret i1 false
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@ -292,6 +306,16 @@ define i1 @cttz_knownbits(i32 %arg) {
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ret i1 %res
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}
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define <2 x i1> @cttz_knownbits_vec(<2 x i32> %arg) {
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; CHECK-LABEL: @cttz_knownbits_vec(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%or = or <2 x i32> %arg, <i32 4, i32 4>
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%cnt = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 true) nounwind readnone
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%res = icmp eq <2 x i32> %cnt, <i32 4, i32 4>
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ret <2 x i1> %res
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}
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define i1 @cttz_knownbits2(i32 %arg) {
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; CHECK-LABEL: @cttz_knownbits2(
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[ARG:%.*]], 4
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@ -305,6 +329,19 @@ define i1 @cttz_knownbits2(i32 %arg) {
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ret i1 %res
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}
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define <2 x i1> @cttz_knownbits2_vec(<2 x i32> %arg) {
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; CHECK-LABEL: @cttz_knownbits2_vec(
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 4, i32 4>
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; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true)
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; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i32> [[CNT]], <i32 2, i32 2>
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; CHECK-NEXT: ret <2 x i1> [[RES]]
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;
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%or = or <2 x i32> %arg, <i32 4, i32 4>
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%cnt = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 true) nounwind readnone
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%res = icmp eq <2 x i32> %cnt, <i32 2, i32 2>
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ret <2 x i1> %res
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}
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; TODO: The icmp is unnecessary given the known bits of the input.
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define i1 @cttz_knownbits3(i32 %arg) {
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; CHECK-LABEL: @cttz_knownbits3(
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@ -319,6 +356,20 @@ define i1 @cttz_knownbits3(i32 %arg) {
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ret i1 %res
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}
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; TODO: The icmp is unnecessary given the known bits of the input.
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define <2 x i1> @cttz_knownbits3_vec(<2 x i32> %arg) {
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; CHECK-LABEL: @cttz_knownbits3_vec(
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 4, i32 4>
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; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true)
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; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i32> [[CNT]], <i32 3, i32 3>
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; CHECK-NEXT: ret <2 x i1> [[RES]]
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;
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%or = or <2 x i32> %arg, <i32 4, i32 4>
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%cnt = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 true) nounwind readnone
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%res = icmp eq <2 x i32> %cnt, <i32 3, i32 3>
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ret <2 x i1> %res
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}
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define i8 @ctlz(i8 %a) {
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; CHECK-LABEL: @ctlz(
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; CHECK-NEXT: ret i8 2
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@ -329,6 +380,19 @@ define i8 @ctlz(i8 %a) {
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ret i8 %count
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}
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define <2 x i8> @ctlz_vec(<2 x i8> %a) {
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; CHECK-LABEL: @ctlz_vec(
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[A:%.*]], <i8 32, i8 32>
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[OR]], <i8 63, i8 63>
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; CHECK-NEXT: [[COUNT:%.*]] = tail call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[AND]], i1 true)
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; CHECK-NEXT: ret <2 x i8> [[COUNT]]
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;
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%or = or <2 x i8> %a, <i8 32, i8 32>
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%and = and <2 x i8> %or, <i8 63, i8 63>
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%count = tail call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %and, i1 true) nounwind readnone
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ret <2 x i8> %count
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}
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define i1 @ctlz_knownbits(i8 %arg) {
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; CHECK-LABEL: @ctlz_knownbits(
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; CHECK-NEXT: ret i1 false
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@ -339,6 +403,16 @@ define i1 @ctlz_knownbits(i8 %arg) {
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ret i1 %res
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}
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define <2 x i1> @ctlz_knownbits_vec(<2 x i8> %arg) {
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; CHECK-LABEL: @ctlz_knownbits_vec(
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; CHECK-NEXT: ret <2 x i1> zeroinitializer
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;
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%or = or <2 x i8> %arg, <i8 32, i8 32>
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%cnt = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %or, i1 true) nounwind readnone
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%res = icmp eq <2 x i8> %cnt, <i8 4, i8 4>
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ret <2 x i1> %res
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}
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define i1 @ctlz_knownbits2(i8 %arg) {
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; CHECK-LABEL: @ctlz_knownbits2(
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[ARG:%.*]], 32
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@ -352,6 +426,19 @@ define i1 @ctlz_knownbits2(i8 %arg) {
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ret i1 %res
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}
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define <2 x i1> @ctlz_knownbits2_vec(<2 x i8> %arg) {
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; CHECK-LABEL: @ctlz_knownbits2_vec(
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[ARG:%.*]], <i8 32, i8 32>
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; CHECK-NEXT: [[CNT:%.*]] = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[OR]], i1 true)
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; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8> [[CNT]], <i8 2, i8 2>
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; CHECK-NEXT: ret <2 x i1> [[RES]]
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;
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%or = or <2 x i8> %arg, <i8 32, i8 32>
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%cnt = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %or, i1 true) nounwind readnone
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%res = icmp eq <2 x i8> %cnt, <i8 2, i8 2>
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ret <2 x i1> %res
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}
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; TODO: The icmp is unnecessary given the known bits of the input.
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define i1 @ctlz_knownbits3(i8 %arg) {
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; CHECK-LABEL: @ctlz_knownbits3(
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@ -366,6 +453,20 @@ define i1 @ctlz_knownbits3(i8 %arg) {
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ret i1 %res
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}
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; TODO: The icmp is unnecessary given the known bits of the input.
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define <2 x i1> @ctlz_knownbits3_vec(<2 x i8> %arg) {
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; CHECK-LABEL: @ctlz_knownbits3_vec(
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[ARG:%.*]], <i8 32, i8 32>
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; CHECK-NEXT: [[CNT:%.*]] = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[OR]], i1 true)
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; CHECK-NEXT: [[RES:%.*]] = icmp eq <2 x i8> [[CNT]], <i8 3, i8 3>
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; CHECK-NEXT: ret <2 x i1> [[RES]]
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;
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%or = or <2 x i8> %arg, <i8 32, i8 32>
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%cnt = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> %or, i1 true) nounwind readnone
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%res = icmp eq <2 x i8> %cnt, <i8 3, i8 3>
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ret <2 x i1> %res
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}
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define void @cmp.simplify(i32 %a, i32 %b, i1* %c) {
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%lz = tail call i32 @llvm.ctlz.i32(i32 %a, i1 false) nounwind readnone
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%lz.cmp = icmp eq i32 %lz, 32
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@ -434,6 +535,15 @@ define i32 @ctlz_undef(i32 %Value) {
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ret i32 %ctlz
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}
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define <2 x i32> @ctlz_undef_vec(<2 x i32> %Value) {
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; CHECK-LABEL: @ctlz_undef_vec(
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; CHECK-NEXT: [[CTLZ:%.*]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> zeroinitializer, i1 true)
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; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
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;
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%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> zeroinitializer, i1 true)
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ret <2 x i32> %ctlz
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}
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define i32 @ctlz_make_undef(i32 %a) {
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%or = or i32 %a, 8
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%ctlz = tail call i32 @llvm.ctlz.i32(i32 %or, i1 false)
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@ -444,13 +554,32 @@ define i32 @ctlz_make_undef(i32 %a) {
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; CHECK-NEXT: ret i32 %ctlz
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}
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define <2 x i32> @ctlz_make_undef_vec(<2 x i32> %a) {
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; CHECK-LABEL: @ctlz_make_undef_vec(
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], <i32 8, i32 8>
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; CHECK-NEXT: [[CTLZ:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[OR]], i1 false)
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; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
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;
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%or = or <2 x i32> %a, <i32 8, i32 8>
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%ctlz = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %or, i1 false)
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ret <2 x i32> %ctlz
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}
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define i32 @cttz_undef(i32 %Value) nounwind {
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; CHECK-LABEL: @cttz_undef(
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; CHECK-NEXT: ret i32 undef
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;
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%cttz = call i32 @llvm.cttz.i32(i32 0, i1 true)
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ret i32 %cttz
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}
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define <2 x i32> @cttz_undef_vec(<2 x i32> %Value) nounwind {
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; CHECK-LABEL: @cttz_undef_vec(
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; CHECK-NEXT: [[CTTZ:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> zeroinitializer, i1 true)
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; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
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;
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%cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> zeroinitializer, i1 true)
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ret <2 x i32> %cttz
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}
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define i32 @cttz_make_undef(i32 %a) {
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@ -463,6 +592,17 @@ define i32 @cttz_make_undef(i32 %a) {
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; CHECK-NEXT: ret i32 %cttz
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}
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define <2 x i32> @cttz_make_undef_vec(<2 x i32> %a) {
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; CHECK-LABEL: @cttz_make_undef_vec(
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], <i32 8, i32 8>
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; CHECK-NEXT: [[CTTZ:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 false)
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; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
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;
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%or = or <2 x i32> %a, <i32 8, i32 8>
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%cttz = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %or, i1 false)
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ret <2 x i32> %cttz
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}
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define i32 @ctlz_select(i32 %Value) nounwind {
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; CHECK-LABEL: @ctlz_select(
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 %Value, i1 false)
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@ -472,7 +612,17 @@ define i32 @ctlz_select(i32 %Value) nounwind {
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%ctlz = call i32 @llvm.ctlz.i32(i32 %Value, i1 true)
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%s = select i1 %tobool, i32 %ctlz, i32 32
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ret i32 %s
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}
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define <2 x i32> @ctlz_select_vec(<2 x i32> %Value) nounwind {
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; CHECK-LABEL: @ctlz_select_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[VALUE:%.*]], i1 false)
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; CHECK-NEXT: ret <2 x i32> [[TMP1]]
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;
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%tobool = icmp ne <2 x i32> %Value, zeroinitializer
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%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %Value, i1 true)
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%s = select <2 x i1> %tobool, <2 x i32> %ctlz, <2 x i32> <i32 32, i32 32>
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ret <2 x i32> %s
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}
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define i32 @cttz_select(i32 %Value) nounwind {
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@ -484,7 +634,17 @@ define i32 @cttz_select(i32 %Value) nounwind {
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%cttz = call i32 @llvm.cttz.i32(i32 %Value, i1 true)
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%s = select i1 %tobool, i32 %cttz, i32 32
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ret i32 %s
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}
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define <2 x i32> @cttz_select_vec(<2 x i32> %Value) nounwind {
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; CHECK-LABEL: @cttz_select_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[VALUE:%.*]], i1 false)
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; CHECK-NEXT: ret <2 x i32> [[TMP1]]
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;
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%tobool = icmp ne <2 x i32> %Value, zeroinitializer
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%cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %Value, i1 true)
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%s = select <2 x i1> %tobool, <2 x i32> %cttz, <2 x i32> <i32 32, i32 32>
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ret <2 x i32> %s
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}
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define i1 @overflow_div_add(i32 %v1, i32 %v2) nounwind {
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@ -199,6 +199,17 @@ define i256 @test_cttz() {
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ret i256 %x
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}
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declare <2 x i256> @llvm.cttz.v2i256(<2 x i256> %src, i1 %is_zero_undef)
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define <2 x i256> @test_cttz_vec() {
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; CHECK-LABEL: @test_cttz_vec(
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; CHECK-NEXT: [[X:%.*]] = call <2 x i256> @llvm.cttz.v2i256(<2 x i256> <i256 10, i256 10>, i1 false)
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; CHECK-NEXT: ret <2 x i256> [[X]]
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;
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%x = call <2 x i256> @llvm.cttz.v2i256(<2 x i256> <i256 10, i256 10>, i1 false)
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ret <2 x i256> %x
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}
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declare i256 @llvm.ctpop.i256(i256 %src)
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define i256 @test_ctpop() {
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