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@ -1346,6 +1346,10 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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// Signed shift right.
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APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt));
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// If any of the "high bits" are demanded, we should set the sign bit as
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// demanded.
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if (DemandedMask.countLeadingZeros() <= ShiftAmt)
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DemandedMaskIn.set(BitWidth-1);
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if (SimplifyDemandedBits(I->getOperand(0),
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DemandedMaskIn,
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RHSKnownZero, RHSKnownOne, Depth+1))
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