[GlobalISel] Verify RegBankSelected MF property.

RegBankSelected functions shouldn't have any generic virtual
register not assigned to a bank. Verify that.

llvm-svn: 277476
This commit is contained in:
Ahmed Bougacha 2016-08-02 16:17:15 +00:00
parent 2471265508
commit 3681c772cf
2 changed files with 38 additions and 1 deletions

View File

@ -70,6 +70,9 @@ namespace {
unsigned foundErrors;
// Avoid querying the MachineFunctionProperties for each operand.
bool isFunctionRegBankSelected;
typedef SmallVector<unsigned, 16> RegVector;
typedef SmallVector<const uint32_t*, 4> RegMaskVector;
typedef DenseSet<unsigned> RegSet;
@ -330,6 +333,9 @@ unsigned MachineVerifier::verify(MachineFunction &MF) {
TRI = MF.getSubtarget().getRegisterInfo();
MRI = &MF.getRegInfo();
isFunctionRegBankSelected = MF.getProperties().hasProperty(
MachineFunctionProperties::Property::RegBankSelected);
LiveVars = nullptr;
LiveInts = nullptr;
LiveStks = nullptr;
@ -1003,8 +1009,18 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
report("Generic virtual register must have a size", MO, MONum);
return;
}
// Make sure the register fits into its register bank if any.
const RegisterBank *RegBank = MRI->getRegBankOrNull(Reg);
// If we're post-RegBankSelect, the gvreg must have a bank.
if (!RegBank && isFunctionRegBankSelected) {
report("Generic virtual register must have a bank in a "
"RegBankSelected function",
MO, MONum);
return;
}
// Make sure the register fits into its register bank if any.
if (RegBank && RegBank->getSize() < Size) {
report("Register bank is too small for virtual register", MO,
MONum);

View File

@ -0,0 +1,21 @@
# RUN: not llc -mtriple aarch64-- -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
--- |
define void @test() { ret void }
...
---
# CHECK: *** Bad machine code: Generic virtual register must have a bank in a RegBankSelected function ***
# CHECK: instruction: %vreg0<def>(64) = COPY
# CHECK: operand 0: %vreg0<def>
name: test
isSSA: true
regBankSelected: true
registers:
- { id: 0, class: _ }
body: |
bb.0:
liveins: %x0
%0(64) = COPY %x0
...