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[Hexagon] Generate proper offset in opt-addr-mode 

Also, make a few changes to allow using the pass in .mir testcases.
Among other things, change the abbreviation from opt-amode to amode-opt,
because otherwise lit would expand the "opt" part to the full path to
the opt binary.

llvm-svn: 300707
This commit is contained in:
Krzysztof Parzyszek 2017-04-19 15:15:51 +00:00
parent 634f57e0bb
commit 333b2bf2ed
3 changed files with 33 additions and 11 deletions
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17
llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
View File

@ -44,10 +44,8 @@ using namespace llvm;
using namespace rdf;
namespace llvm {
FunctionPass *createHexagonOptAddrMode();
void initializeHexagonOptAddrModePass(PassRegistry &);
void initializeHexagonOptAddrModePass(PassRegistry&);
} // end namespace llvm
namespace {
@ -58,10 +56,7 @@ public:
HexagonOptAddrMode()
: MachineFunctionPass(ID), HII(nullptr), MDT(nullptr), DFG(nullptr),
LV(nullptr) {
PassRegistry &R = *PassRegistry::getPassRegistry();
initializeHexagonOptAddrModePass(R);
}
LV(nullptr) {}
StringRef getPassName() const override {
return "Optimize addressing mode of load/store";
@ -108,11 +103,11 @@ private:
char HexagonOptAddrMode::ID = 0;
INITIALIZE_PASS_BEGIN(HexagonOptAddrMode, "opt-amode",
INITIALIZE_PASS_BEGIN(HexagonOptAddrMode, "amode-opt",
"Optimize addressing mode", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_DEPENDENCY(MachineDominanceFrontier)
INITIALIZE_PASS_END(HexagonOptAddrMode, "opt-amode", "Optimize addressing mode",
INITIALIZE_PASS_END(HexagonOptAddrMode, "amode-opt", "Optimize addressing mode",
false, false)
bool HexagonOptAddrMode::hasRepForm(MachineInstr &MI, unsigned TfrDefR) {
@ -485,14 +480,14 @@ bool HexagonOptAddrMode::changeAddAsl(NodeAddr<UseNode *> AddAslUN,
MIB.add(AddAslMI->getOperand(2));
MIB.add(AddAslMI->getOperand(3));
const GlobalValue *GV = ImmOp.getGlobal();
MIB.addGlobalAddress(GV, UseMI->getOperand(2).getImm(),
MIB.addGlobalAddress(GV, UseMI->getOperand(2).getImm()+ImmOp.getOffset(),
ImmOp.getTargetFlags());
OpStart = 3;
} else if (UseMID.mayStore()) {
MIB.add(AddAslMI->getOperand(2));
MIB.add(AddAslMI->getOperand(3));
const GlobalValue *GV = ImmOp.getGlobal();
MIB.addGlobalAddress(GV, UseMI->getOperand(1).getImm(),
MIB.addGlobalAddress(GV, UseMI->getOperand(1).getImm()+ImmOp.getOffset(),
ImmOp.getTargetFlags());
MIB.add(UseMI->getOperand(2));
OpStart = 3;

2
llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
View File

@ -111,6 +111,7 @@ namespace llvm {
extern char &HexagonExpandCondsetsID;
void initializeHexagonExpandCondsetsPass(PassRegistry&);
void initializeHexagonLoopIdiomRecognizePass(PassRegistry&);
void initializeHexagonOptAddrModePass(PassRegistry&);
Pass *createHexagonLoopIdiomPass();
FunctionPass *createHexagonBitSimplify();
@ -152,6 +153,7 @@ extern "C" void LLVMInitializeHexagonTarget() {
// Register the target.
RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget());
initializeHexagonLoopIdiomRecognizePass(*PassRegistry::getPassRegistry());
initializeHexagonOptAddrModePass(*PassRegistry::getPassRegistry());
}
HexagonTargetMachine::HexagonTargetMachine(const Target &T, const Triple &TT,

25
llvm/test/CodeGen/Hexagon/addrmode-globoff.mir Normal file
View File

@ -0,0 +1,25 @@
# RUN: llc -march=hexagon -run-pass amode-opt %s -o - | FileCheck %s
--- |
@g0 = external global [16 x i16], align 8
define void @foo() {
ret void
}
...
---
name: foo
tracksRegLiveness: true
body: |
bb.0:
liveins: %r0
; Make sure that the offset in @g0 is 8.
; CHECK: S4_storerh_ur killed %r0, 2, @g0 + 8, %r0
%r1 = A2_tfrsi @g0+4
%r2 = S2_addasl_rrri %r1, %r0, 2
S2_storerh_io %r2, 4, %r0
...