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Get the register and count from the register list operands. 

llvm-svn: 118458
This commit is contained in:
Bill Wendling 2010-11-08 23:51:20 +00:00
parent aeead4d1e1
commit 31b850be15
1 changed files with 5 additions and 8 deletions
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13
llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp
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@ -378,14 +378,11 @@ getBitfieldInvertedMaskOpValue(const MCInst &MI, unsigned Op,
unsigned ARMMCCodeEmitter::
getRegisterListOpValue(const MCInst &MI, unsigned Op,
SmallVectorImpl<MCFixup> &Fixups) const {
// Convert a list of GPRs into a bitfield (R0 -> bit 0). For each
// register in the list, set the corresponding bit.
unsigned Binary = 0;
for (unsigned i = Op, e = MI.getNumOperands(); i < e; ++i) {
unsigned regno = getARMRegisterNumbering(MI.getOperand(i).getReg());
Binary |= 1 << regno;
}
SmallVectorImpl<MCFixup> &) const {
// {12-8} = Rd
// {7-0} = count
unsigned Binary = getARMRegisterNumbering(MI.getOperand(Op).getReg()) << 8;
Binary |= MI.getOperand(Op + 1).getImm() & 0xFF;
return Binary;
}