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Use the correct fixup type for ARM VLDR* 

llvm-svn: 120604
This commit is contained in:
Jim Grosbach 2010-12-01 21:09:40 +00:00
parent 5fe5f45352
commit 30eb6c7e71
1 changed files with 2 additions and 2 deletions
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4
llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp
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@ -658,7 +658,7 @@ getAddrModeS1OpValue(const MCInst &MI, unsigned OpIdx,
return getAddrModeSOpValue(MI, OpIdx, 1);
}
/// getAddrMode5OpValue - Return encoding info for 'reg +/- imm12' operand.
/// getAddrMode5OpValue - Return encoding info for 'reg +/- imm10' operand.
uint32_t ARMMCCodeEmitter::
getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx,
SmallVectorImpl<MCFixup> &Fixups) const {
@ -676,7 +676,7 @@ getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx,
assert(MO.isExpr() && "Unexpected machine operand type!");
const MCExpr *Expr = MO.getExpr();
MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_pcrel_12);
MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_pcrel_10);
Fixups.push_back(MCFixup::Create(0, Expr, Kind));
++MCNumCPRelocations;