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Mark operands as symbol lo instead of imm32 so that they print lo(x) around 

globals.

llvm-svn: 31672
This commit is contained in:
Chris Lattner 2006-11-11 04:51:36 +00:00
parent 1a6eaa49fe
commit 2ff632c54b
2 changed files with 11 additions and 11 deletions
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10
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
View File

@ -249,7 +249,7 @@ def LWAX : XForm_1<31, 341, (ops G8RC:$rD, memrr:$src),
PPC970_DGroup_Cracked;
// Update forms.
def LHAU8 : DForm_1<43, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LHAU8 : DForm_1<43, (ops G8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"lhau $rD, $disp($rA)", LdStGeneral,
[]>, RegConstraint<"$rA = $rA_result">;
@ -281,15 +281,15 @@ def LWZX8 : XForm_1<31, 23, (ops G8RC:$rD, memrr:$src),
// Update forms.
def LBZU8 : DForm_1<35, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LBZU8 : DForm_1<35, (ops G8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"lbzu $rD, $disp($rA)", LdStGeneral,
[]>, RegConstraint<"$rA = $rA_result">;
def LHZU8 : DForm_1<41, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LHZU8 : DForm_1<41, (ops G8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"lhzu $rD, $disp($rA)", LdStGeneral,
[]>, RegConstraint<"$rA = $rA_result">;
def LWZU8 : DForm_1<33, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LWZU8 : DForm_1<33, (ops G8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"lwzu $rD, $disp($rA)", LdStGeneral,
[]>, RegConstraint<"$rA = $rA_result">;
@ -306,7 +306,7 @@ def LDX : XForm_1<31, 21, (ops G8RC:$rD, memrr:$src),
"ldx $rD, $src", LdStLD,
[(set G8RC:$rD, (load xaddr:$src))]>, isPPC64;
def LDU : DSForm_1<58, 1, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LDU : DSForm_1<58, 1, (ops G8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"ldu $rD, $disp($rA)", LdStLD,
[]>, RegConstraint<"$rA = $rA_result">, isPPC64;

12
llvm/lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -432,31 +432,31 @@ def LFD : DForm_1<50, (ops F8RC:$rD, memri:$src),
// FIXME: PTRRC for Pointer regs for ppc64.
// 'Update' load forms.
def LBZU : DForm_1<35, (ops GPRC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LBZU : DForm_1<35, (ops GPRC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"lbzu $rD, $disp($rA)", LdStGeneral,
[]>, RegConstraint<"$rA = $rA_result">;
def LHAU : DForm_1<43, (ops GPRC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LHAU : DForm_1<43, (ops GPRC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"lhau $rD, $disp($rA)", LdStGeneral,
[]>, RegConstraint<"$rA = $rA_result">;
def LHZU : DForm_1<41, (ops GPRC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LHZU : DForm_1<41, (ops GPRC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"lhzu $rD, $disp($rA)", LdStGeneral,
[]>, RegConstraint<"$rA = $rA_result">;
def LWZU : DForm_1<33, (ops GPRC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LWZU : DForm_1<33, (ops GPRC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"lwzu $rD, $disp($rA)", LdStGeneral,
[]>, RegConstraint<"$rA = $rA_result">;
def LFSU : DForm_1<49, (ops F4RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LFSU : DForm_1<49, (ops F4RC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"lfs $rD, $disp($rA)", LdStLFDU,
[]>, RegConstraint<"$rA = $rA_result">;
def LFDU : DForm_1<51, (ops F8RC:$rD, ptr_rc:$rA_result, i32imm:$disp,
def LFDU : DForm_1<51, (ops F8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp,
ptr_rc:$rA),
"lfd $rD, $disp($rA)", LdStLFD,
[]>, RegConstraint<"$rA = $rA_result">;