Fixes to read the floating point and exception registers sets out
of arm Mach-O core files. <rdar://problem/13665075> llvm-svn: 181755
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cad47f0297
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@ -289,6 +289,10 @@ public:
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SetError (GPRRegSet, Read, -1);
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SetError (FPURegSet, Read, -1);
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SetError (EXCRegSet, Read, -1);
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bool done = false;
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while (!done)
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{
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int flavor = data.GetU32 (&offset);
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uint32_t count = data.GetU32 (&offset);
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switch (flavor)
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@ -298,16 +302,30 @@ public:
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gpr.r[i] = data.GetU32(&offset);
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SetError (GPRRegSet, Read, 0);
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break;
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case FPURegSet:
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// TODO: fill in FPU regs....
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//SetError (FPURegSet, Read, -1);
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{
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uint32_t *d = &fpu.floats.s[0];
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for (uint32_t i = 0; i < count && d < d + (sizeof (fpu.floats) / sizeof (uint32_t)); i++)
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{
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*d++ = data.GetU32(&offset);
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}
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SetError (FPURegSet, Read, 0);
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}
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break;
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case EXCRegSet:
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exc.exception = data.GetU32(&offset);
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exc.fsr = data.GetU32(&offset);
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exc.far = data.GetU32(&offset);
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SetError (EXCRegSet, Read, 0);
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done = true;
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break;
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// Unknown register set flavor, stop trying to parse.
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default:
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done = true;
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}
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}
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}
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protected:
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@ -114,11 +114,17 @@ public:
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};
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struct QReg
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{
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uint8_t bytes[16];
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};
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struct FPU
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{
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union {
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uint32_t s[32];
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uint64_t d[16];
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uint64_t d[32];
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QReg q[16]; // the 128-bit NEON registers
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} floats;
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uint32_t fpscr;
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};
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@ -160,10 +166,10 @@ protected:
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enum
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{
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GPRRegSet = 1,
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FPURegSet = 2,
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EXCRegSet = 3,
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DBGRegSet = 4
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GPRRegSet = 1, // ARM_THREAD_STATE
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FPURegSet = 2, // ARM_VFP_STATE
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EXCRegSet = 3, // ARM_EXCEPTION_STATE
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DBGRegSet = 4 // ARM_DEBUG_STATE
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};
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enum
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