Mapping SDNode flags to MachineInstr flags
Summary: Providing the glue to map SDNode fast math sub flags to MachineInstr fast math sub flags. Reviewers: spatel, arsenm, wristow Reviewed By: spatel Subscribers: wdng Differential Revision: https://reviews.llvm.org/D46447 llvm-svn: 331567
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@ -824,9 +824,34 @@ EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
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// Add result register values for things that are defined by this
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// instruction.
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if (NumResults)
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if (NumResults) {
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CreateVirtualRegisters(Node, MIB, II, IsClone, IsCloned, VRBaseMap);
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// Transfer any IR flags from the SDNode to the MachineInstr
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MachineInstr *MI = MIB.getInstr();
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const SDNodeFlags Flags = Node->getFlags();
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if (Flags.hasNoSignedZeros())
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MI->setFlag(MachineInstr::MIFlag::FmNsz);
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if (Flags.hasAllowReciprocal())
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MI->setFlag(MachineInstr::MIFlag::FmArcp);
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if (Flags.hasNoNaNs())
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MI->setFlag(MachineInstr::MIFlag::FmNoNans);
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if (Flags.hasNoInfs())
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MI->setFlag(MachineInstr::MIFlag::FmNoInfs);
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if (Flags.hasAllowContract())
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MI->setFlag(MachineInstr::MIFlag::FmContract);
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if (Flags.hasApproximateFuncs())
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MI->setFlag(MachineInstr::MIFlag::FmAfn);
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if (Flags.hasAllowReassociation())
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MI->setFlag(MachineInstr::MIFlag::FmReassoc);
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}
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// Emit all of the actual operands of this instruction, adding them to the
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// instruction as appropriate.
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bool HasOptPRefs = NumDefs > NumResults;
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@ -7,16 +7,16 @@ define float @foo(float %f) #0 {
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; CHECK: body:
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; CHECK: %0:fr32 = COPY $xmm0
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; CHECK: %1:fr32 = VRSQRTSSr killed %2, %0
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; CHECK: %3:fr32 = VMULSSrr %0, %1
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; CHECK: %3:fr32 = reassoc VMULSSrr %0, %1
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; CHECK: %4:fr32 = VMOVSSrm
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; CHECK: %5:fr32 = VFMADD213SSr %1, killed %3, %4
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; CHECK: %6:fr32 = VMOVSSrm
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; CHECK: %7:fr32 = VMULSSrr %1, %6
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; CHECK: %8:fr32 = VMULSSrr killed %7, killed %5
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; CHECK: %9:fr32 = VMULSSrr %0, %8
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; CHECK: %7:fr32 = reassoc VMULSSrr %1, %6
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; CHECK: %8:fr32 = reassoc VMULSSrr killed %7, killed %5
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; CHECK: %9:fr32 = reassoc VMULSSrr %0, %8
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; CHECK: %10:fr32 = VFMADD213SSr %8, %9, %4
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; CHECK: %11:fr32 = VMULSSrr %9, %6
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; CHECK: %12:fr32 = VMULSSrr killed %11, killed %10
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; CHECK: %11:fr32 = reassoc VMULSSrr %9, %6
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; CHECK: %12:fr32 = reassoc VMULSSrr killed %11, killed %10
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; CHECK: %14:fr32 = FsFLD0SS
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; CHECK: %15:fr32 = VCMPSSrr %0, killed %14, 0
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; CHECK: %17:vr128 = VANDNPSrr killed %16, killed %13
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@ -31,16 +31,16 @@ define float @rfoo(float %f) #0 {
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; CHECK: body: |
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; CHECK: %0:fr32 = COPY $xmm0
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; CHECK: %1:fr32 = VRSQRTSSr killed %2, %0
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; CHECK: %3:fr32 = VMULSSrr %0, %1
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; CHECK: %3:fr32 = nnan ninf nsz arcp contract afn reassoc VMULSSrr %0, %1
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; CHECK: %4:fr32 = VMOVSSrm
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; CHECK: %5:fr32 = VFMADD213SSr %1, killed %3, %4
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; CHECK: %6:fr32 = VMOVSSrm
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; CHECK: %7:fr32 = VMULSSrr %1, %6
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; CHECK: %8:fr32 = VMULSSrr killed %7, killed %5
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; CHECK: %9:fr32 = VMULSSrr %0, %8
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; CHECK: %7:fr32 = nnan ninf nsz arcp contract afn reassoc VMULSSrr %1, %6
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; CHECK: %8:fr32 = nnan ninf nsz arcp contract afn reassoc VMULSSrr killed %7, killed %5
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; CHECK: %9:fr32 = nnan ninf nsz arcp contract afn reassoc VMULSSrr %0, %8
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; CHECK: %10:fr32 = VFMADD213SSr %8, killed %9, %4
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; CHECK: %11:fr32 = VMULSSrr %8, %6
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; CHECK: %12:fr32 = VMULSSrr killed %11, killed %10
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; CHECK: %11:fr32 = nnan ninf nsz arcp contract afn reassoc VMULSSrr %8, %6
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; CHECK: %12:fr32 = nnan ninf nsz arcp contract afn reassoc VMULSSrr killed %11, killed %10
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; CHECK: $xmm0 = COPY %12
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; CHECK: RET 0, $xmm0
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%sqrt = tail call float @llvm.sqrt.f32(float %f)
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