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d441d407cf
commit
2da29177ba
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@ -798,6 +798,33 @@ Instruction *InstCombiner::OptAndOp(Instruction *Op,
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}
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}
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break;
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case Instruction::Shl: {
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// We know that the AND will not produce any of the bits shifted in, so if
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// the anded constant includes them, clear them now!
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//
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Constant *AllOne = ConstantIntegral::getAllOnesValue(AndRHS->getType());
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Constant *CI = *AndRHS & *(*AllOne << *OpRHS);
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if (CI != AndRHS) {
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TheAnd.setOperand(1, CI);
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return &TheAnd;
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}
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break;
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}
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case Instruction::Shr:
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// We know that the AND will not produce any of the bits shifted in, so if
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// the anded constant includes them, clear them now! This only applies to
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// unsigned shifts, because a signed shr may bring in set bits!
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//
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if (AndRHS->getType()->isUnsigned()) {
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Constant *AllOne = ConstantIntegral::getAllOnesValue(AndRHS->getType());
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Constant *CI = *AndRHS & *(*AllOne >> *OpRHS);
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if (CI != AndRHS) {
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TheAnd.setOperand(1, CI);
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return &TheAnd;
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}
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}
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break;
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}
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return 0;
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}
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