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[x86] add checks for asm to test; NFC 

llvm-svn: 347394
This commit is contained in:
Sanjay Patel 2018-11-21 15:26:35 +00:00
parent 5448339889
commit 2c513f5b4b
1 changed files with 15 additions and 5 deletions
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20
llvm/test/CodeGen/X86/ipra-reg-alias.ll
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@ -1,12 +1,22 @@
; RUN: llc -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
target triple = "x86_64--"
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-- -enable-ipra -print-regusage -o - 2>&1 < %s | FileCheck %s --check-prefix=DEBUG
; RUN: llc -mtriple=x86_64-- -enable-ipra -o - < %s | FileCheck %s
; Here only CL is clobbered so CH should not be clobbred, but CX, ECX and RCX
; should be clobbered.
; DEBUG: main Clobbered Registers: $ah $al $ax $cl $cx $eax $ecx $eflags $hax $rax $rcx
define i8 @main(i8 %X) {
; CHECK-LABEL: main:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: movb $5, %cl
; CHECK-NEXT: # kill: def $al killed $al killed $eax
; CHECK-NEXT: mulb %cl
; CHECK-NEXT: addb $5, %al
; CHECK-NEXT: retq
%inc = add i8 %X, 1
%inc2 = mul i8 %inc, 5
; Here only CL is clobbred so CH should not be clobbred, but CX, ECX and RCX
; should be clobbered.
; CHECK: main Clobbered Registers: $ah $al $ax $cl $cx $eax $ecx $eflags $hax $rax $rcx
ret i8 %inc2
}