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R600/SI: Add new helper isSGPRClassID 

Move these into header since they are trivial

llvm-svn: 218360
This commit is contained in:
Matt Arsenault 2014-09-24 02:17:12 +00:00
parent 262407bc2f
commit 2c41987490
2 changed files with 14 additions and 8 deletions
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7
llvm/lib/Target/R600/SIRegisterInfo.cpp
View File

@ -288,13 +288,6 @@ const TargetRegisterClass *SIRegisterInfo::getPhysRegClass(unsigned Reg) const {
return nullptr; return nullptr;
} }
bool SIRegisterInfo::isSGPRClass(const TargetRegisterClass *RC) const {
if (!RC) {
return false;
}
return !hasVGPRs(RC);
}
bool SIRegisterInfo::hasVGPRs(const TargetRegisterClass *RC) const { bool SIRegisterInfo::hasVGPRs(const TargetRegisterClass *RC) const {
return getCommonSubClass(&AMDGPU::VReg_32RegClass, RC) || return getCommonSubClass(&AMDGPU::VReg_32RegClass, RC) ||
getCommonSubClass(&AMDGPU::VReg_64RegClass, RC) || getCommonSubClass(&AMDGPU::VReg_64RegClass, RC) ||

15
llvm/lib/Target/R600/SIRegisterInfo.h
View File

@ -46,7 +46,20 @@ struct SIRegisterInfo : public AMDGPURegisterInfo {
const TargetRegisterClass *getPhysRegClass(unsigned Reg) const; const TargetRegisterClass *getPhysRegClass(unsigned Reg) const;
/// \returns true if this class contains only SGPR registers /// \returns true if this class contains only SGPR registers
bool isSGPRClass(const TargetRegisterClass *RC) const; bool isSGPRClass(const TargetRegisterClass *RC) const {
if (!RC)
return false;
return !hasVGPRs(RC);
}
/// \returns true if this class ID contains only SGPR registers
bool isSGPRClassID(unsigned RCID) const {
if (static_cast<int>(RCID) == -1)
return false;
return isSGPRClass(getRegClass(RCID));
}
/// \returns true if this class contains VGPR registers. /// \returns true if this class contains VGPR registers.
bool hasVGPRs(const TargetRegisterClass *RC) const; bool hasVGPRs(const TargetRegisterClass *RC) const;