parent
56526ec1a9
commit
2ba45d1ee9
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@ -369,7 +369,7 @@ bool AlphaISel::SelectFPSetCC(SDOperand N, unsigned dst)
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//assert(0 && "Setcc On float?\n");
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//assert(0 && "Setcc On float?\n");
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std::cerr << "Setcc on float!\n";
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std::cerr << "Setcc on float!\n";
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Tmp3 = MakeReg(MVT::f64);
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Tmp3 = MakeReg(MVT::f64);
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BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Alpha::F31).addReg(Tmp1);
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BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Tmp1);
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Tmp1 = Tmp3;
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Tmp1 = Tmp3;
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}
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}
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if (SetCC->getOperand(1).getValueType() == MVT::f32)
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if (SetCC->getOperand(1).getValueType() == MVT::f32)
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@ -377,7 +377,7 @@ bool AlphaISel::SelectFPSetCC(SDOperand N, unsigned dst)
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//assert (0 && "Setcc On float?\n");
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//assert (0 && "Setcc On float?\n");
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std::cerr << "Setcc on float!\n";
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std::cerr << "Setcc on float!\n";
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Tmp3 = MakeReg(MVT::f64);
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Tmp3 = MakeReg(MVT::f64);
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BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Alpha::F31).addReg(Tmp2);
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BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Tmp2);
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Tmp2 = Tmp3;
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Tmp2 = Tmp3;
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}
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}
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